Lines Matching refs:ih
3000 rdev->ih.ring_obj = NULL;
3256 rdev->ih.ring_size = ring_size;
3257 rdev->ih.ptr_mask = rdev->ih.ring_size - 1;
3258 rdev->ih.rptr = 0;
3267 if (rdev->ih.ring_obj == NULL) {
3268 r = radeon_bo_create(rdev, rdev->ih.ring_size,
3271 NULL, &rdev->ih.ring_obj);
3273 DRM_ERROR("radeon: failed to create ih ring buffer (%d).\n", r);
3276 r = radeon_bo_reserve(rdev->ih.ring_obj, false);
3278 radeon_bo_unref(&rdev->ih.ring_obj);
3281 r = radeon_bo_pin(rdev->ih.ring_obj,
3283 &rdev->ih.gpu_addr);
3285 radeon_bo_unreserve(rdev->ih.ring_obj);
3286 radeon_bo_unref(&rdev->ih.ring_obj);
3287 DRM_ERROR("radeon: failed to pin ih ring buffer (%d).\n", r);
3290 ring_ptr = &rdev->ih.ring;
3291 r = radeon_bo_kmap(rdev->ih.ring_obj,
3294 radeon_bo_unpin(rdev->ih.ring_obj);
3295 radeon_bo_unreserve(rdev->ih.ring_obj);
3297 DRM_ERROR("radeon: failed to map ih ring buffer (%d).\n", r);
3298 radeon_bo_unref(&rdev->ih.ring_obj);
3308 if (rdev->ih.ring_obj) {
3309 r = radeon_bo_reserve(rdev->ih.ring_obj, false);
3311 radeon_bo_kunmap(rdev->ih.ring_obj);
3312 radeon_bo_unpin(rdev->ih.ring_obj);
3313 radeon_bo_unreserve(rdev->ih.ring_obj);
3315 radeon_bo_unref(&rdev->ih.ring_obj);
3316 rdev->ih.ring = NULL;
3317 rdev->ih.ring_obj = NULL;
3413 rdev->ih.enabled = true;
3428 rdev->ih.enabled = false;
3429 rdev->ih.rptr = 0;
3508 WREG32(INTERRUPT_CNTL2, rdev->ih.gpu_addr >> 8);
3518 WREG32(IH_RB_BASE, rdev->ih.gpu_addr >> 8);
3519 rb_bufsz = drm_order(rdev->ih.ring_size / 4);
3586 /* don't enable anything if the ih is disabled */
3587 if (!rdev->ih.enabled) {
3842 wptr, rdev->ih.rptr, (wptr + 16) + rdev->ih.ptr_mask);
3843 rdev->ih.rptr = (wptr + 16) & rdev->ih.ptr_mask;
3848 return (wptr & rdev->ih.ptr_mask);
3890 if (!rdev->ih.enabled || rdev->shutdown)
3901 if (atomic_xchg(&rdev->ih.lock, 1))
3904 rptr = rdev->ih.rptr;
3916 src_id = le32_to_cpu(rdev->ih.ring[ring_index]) & 0xff;
3917 src_data = le32_to_cpu(rdev->ih.ring[ring_index + 1]) & 0xfffffff;
4066 rptr &= rdev->ih.ptr_mask;
4072 rdev->ih.rptr = rptr;
4073 WREG32(IH_RB_RPTR, rdev->ih.rptr);
4074 atomic_set(&rdev->ih.lock, 0);