Lines Matching refs:states
2804 =0: Multiple power states supported from PowerPlay table.
2807 Bit[5]=1: Enable CDLW for all driver control power states. Max HT width is from SBIOS, while Min HT width is determined by display requirement.
2809 Bit[6]=1: High Voltage requested for all power states. In this case, voltage will be forced at 1.1v and powerplay table voltage drop/throttling request will be ignored.
7626 //how many states we have
7629 ATOM_PPLIB_STATE_V2 states[1];
7645 //how many non-clock levels we have. normally should be same as number of states
7736 UCHAR ucClockInfoIndex; //highest 2 bits indicates memory p-states, lower 6bits indicates index to ClockInfoArrary
7751 // ATOM_PPLIB_VCE_State_Table states;
7782 UCHAR ucClockInfoIndex; //highest 2 bits indicates memory p-states, lower 6bits indicates index to ClockInfoArrary
7797 // ATOM_PPLIB_UVD_State_Table states;