Lines Matching defs:phy_index

2246 	uint8_t phy_index;
2249 for (phy_index = ELINK_INT_PHY; phy_index < params->num_phys;
2250 phy_index++)
2252 params->phy[phy_index].mdio_ctrl);
4014 uint8_t phy_index;
4018 for (phy_index = 0; phy_index < params->num_phys; phy_index++) {
4019 if (params->phy[phy_index].addr == phy_addr) {
4021 &params->phy[phy_index], devad,
4031 uint8_t phy_index;
4035 for (phy_index = 0; phy_index < params->num_phys; phy_index++) {
4036 if (params->phy[phy_index].addr == phy_addr) {
4038 &params->phy[phy_index], devad,
4248 uint8_t actual_phy_idx, phy_index, link_cfg_idx;
4251 for (phy_index = ELINK_INT_PHY; phy_index < params->num_phys;
4252 phy_index++) {
4253 link_cfg_idx = ELINK_LINK_CONFIG_IDX(phy_index);
4254 actual_phy_idx = phy_index;
4256 if (phy_index == ELINK_EXT_PHY1)
4258 else if (phy_index == ELINK_EXT_PHY2)
7322 uint16_t gp_status = 0, phy_index = 0;
7380 for (phy_index = ELINK_EXT_PHY1; phy_index < params->num_phys;
7381 phy_index++) {
7382 serdes_phy_type = ((params->phy[phy_index].media_type ==
7384 (params->phy[phy_index].media_type ==
7386 (params->phy[phy_index].media_type ==
7388 (params->phy[phy_index].media_type ==
7393 if (params->phy[phy_index].read_status) {
7395 params->phy[phy_index].read_status(
7396 &params->phy[phy_index],
7410 uint8_t phy_index, non_ext_phy;
7452 for (phy_index = ELINK_EXT_PHY1; phy_index < params->num_phys;
7453 phy_index++) {
7459 if (params->phy[phy_index].supported &
7463 if (phy_index == ELINK_EXT_PHY2 &&
7470 params->phy[phy_index].config_init(
7471 &params->phy[phy_index],
7685 uint8_t link_10g_plus, phy_index;
7693 for (phy_index = ELINK_INT_PHY; phy_index < params->num_phys;
7694 phy_index++) {
7695 phy_vars[phy_index].flow_ctrl = 0;
7696 phy_vars[phy_index].link_status = 0;
7697 phy_vars[phy_index].line_speed = 0;
7698 phy_vars[phy_index].duplex = DUPLEX_FULL;
7699 phy_vars[phy_index].phy_link_up = 0;
7700 phy_vars[phy_index].link_up = 0;
7701 phy_vars[phy_index].fault_detected = 0;
7703 phy_vars[phy_index].eee_status = vars->eee_status;
7733 for (phy_index = ELINK_EXT_PHY1; phy_index < params->num_phys;
7734 phy_index++) {
7735 struct elink_phy *phy = &params->phy[phy_index];
7740 &phy_vars[phy_index]);
7743 phy_index);
7746 phy_index);
7752 active_external_phy = phy_index;
7851 for (phy_index = ELINK_EXT_PHY1; phy_index < params->num_phys;
7852 phy_index++) {
7853 if (params->phy[phy_index].flags &
7856 phy_index ==
12960 uint8_t phy_index)
12969 if (phy_index == ELINK_INT_PHY || phy_index == ELINK_EXT_PHY1) {
12998 uint8_t phy_index, uint8_t port)
13001 switch (phy_index) {
13013 ELINK_DEBUG_P1(sc, "Invalid phy_index %d\n", phy_index);
13160 uint8_t phy_index,
13169 phy_index, port);
13235 elink_populate_preemphasis(sc, shmem_base, phy, port, phy_index);
13243 if (phy_index == ELINK_EXT_PHY1) {
13281 phy_type, port, phy_index);
13287 static elink_status_t elink_populate_phy(struct bxe_softc *sc, uint8_t phy_index, uint32_t shmem_base,
13292 if (phy_index == ELINK_INT_PHY)
13294 status = elink_populate_ext_phy(sc, phy_index, shmem_base, shmem2_base,
13301 uint8_t phy_index)
13306 if (phy_index == ELINK_EXT_PHY2) {
13325 phy_index, link_config, phy->speed_cap_mask);
13354 phy_index, phy->req_duplex);
13411 uint8_t phy_index, actual_phy_idx;
13424 for (phy_index = ELINK_INT_PHY; phy_index < ELINK_MAX_PHYS;
13425 phy_index++) {
13426 actual_phy_idx = phy_index;
13428 if (phy_index == ELINK_EXT_PHY1)
13430 else if (phy_index == ELINK_EXT_PHY2)
13433 ELINK_DEBUG_P3(sc, "phy_config_swapped %x, phy_index %x,"
13435 phy_index, actual_phy_idx);
13437 if (elink_populate_phy(sc, phy_index, params->shmem_base,
13442 phy_index);
13443 for (phy_index = ELINK_INT_PHY;
13444 phy_index < ELINK_MAX_PHYS;
13445 phy_index++)
13479 elink_phy_def_cfg(params, phy, phy_index);
13790 uint8_t phy_index;
13791 for (phy_index = ELINK_EXT_PHY1;
13792 phy_index < params->num_phys; phy_index++)
13793 if (params->phy[phy_index].config_loopback)
13794 params->phy[phy_index].config_loopback(
13795 &params->phy[phy_index],
14076 uint8_t phy_index, port = params->port, clear_latch_ind = 0;
14130 for (phy_index = ELINK_EXT_PHY1; phy_index < params->num_phys;
14131 phy_index++) {
14132 if (params->phy[phy_index].link_reset) {
14134 &params->phy[phy_index]);
14135 params->phy[phy_index].link_reset(
14136 &params->phy[phy_index],
14139 if (params->phy[phy_index].flags &
14234 uint32_t shmem2_base_path[], uint8_t phy_index,
14262 if (elink_populate_phy(sc, phy_index, shmem_base, shmem2_base,
14360 uint32_t shmem2_base_path[], uint8_t phy_index,
14387 if (elink_populate_phy(sc, phy_index, shmem_base, shmem2_base,
14455 uint32_t shmem2_base_path[], uint8_t phy_index,
14503 if (elink_populate_phy(sc, phy_index, shmem_base, shmem2_base,
14555 uint8_t phy_index,
14568 uint32_t shmem2_base_path[], uint8_t phy_index,
14577 phy_index, chip_id);
14584 phy_index, chip_id);
14593 phy_index, chip_id);
14603 phy_index, chip_id);
14628 uint8_t phy_index = 0;
14654 for (phy_index = ELINK_EXT_PHY1; phy_index < ELINK_MAX_PHYS;
14655 phy_index++) {
14658 phy_index, 0);
14662 phy_index, ext_phy_type,
15014 uint8_t phy_index, fan_failure_det_req = 0;
15016 for (phy_index = ELINK_EXT_PHY1; phy_index < ELINK_MAX_PHYS;
15017 phy_index++) {
15018 if (elink_populate_phy(sc, phy_index, shmem_base, shmem2_base,
15032 uint8_t phy_index;
15041 for (phy_index = ELINK_INT_PHY; phy_index < ELINK_MAX_PHYS;
15042 phy_index++) {
15043 if (params->phy[phy_index].hw_reset) {
15044 params->phy[phy_index].hw_reset(
15045 &params->phy[phy_index],
15047 params->phy[phy_index] = phy_null;
15056 uint8_t gpio_num = 0xff, gpio_port = 0xff, phy_index;
15068 for (phy_index = ELINK_EXT_PHY1; phy_index < ELINK_MAX_PHYS;
15069 phy_index++) {
15070 if (elink_populate_phy(sc, phy_index, shmem_base,