Lines Matching refs:uint64_t
56 static inline uint64_t CVMX_SRXX_COM_CTL(unsigned long block_id)
68 static inline uint64_t CVMX_SRXX_IGN_RX_FULL(unsigned long block_id)
80 static inline uint64_t CVMX_SRXX_SPI4_CALX(unsigned long offset, unsigned long block_id)
92 static inline uint64_t CVMX_SRXX_SPI4_STAT(unsigned long block_id)
104 static inline uint64_t CVMX_SRXX_SW_TICK_CTL(unsigned long block_id)
116 static inline uint64_t CVMX_SRXX_SW_TICK_DAT(unsigned long block_id)
141 uint64_t u64;
144 uint64_t reserved_8_63 : 56;
145 uint64_t prts : 4; /**< Number of ports in the receiver (write: ports - 1)
151 uint64_t st_en : 1; /**< Status channel enabled
155 uint64_t reserved_1_2 : 2;
156 uint64_t inf_en : 1; /**< Interface enable
162 uint64_t inf_en : 1;
163 uint64_t reserved_1_2 : 2;
164 uint64_t st_en : 1;
165 uint64_t prts : 4;
166 uint64_t reserved_8_63 : 56;
196 uint64_t u64;
199 uint64_t reserved_16_63 : 48;
200 uint64_t ignore : 16; /**< This port should ignore backpressure hints from
205 uint64_t ignore : 16;
206 uint64_t reserved_16_63 : 48;
243 uint64_t u64;
246 uint64_t reserved_17_63 : 47;
247 uint64_t oddpar : 1; /**< Odd parity over SRX_SPI4_CAL[15:0]
249 uint64_t prt3 : 4; /**< Status for port n+3 */
250 uint64_t prt2 : 4; /**< Status for port n+2 */
251 uint64_t prt1 : 4; /**< Status for port n+1 */
252 uint64_t prt0 : 4; /**< Status for port n+0 */
254 uint64_t prt0 : 4;
255 uint64_t prt1 : 4;
256 uint64_t prt2 : 4;
257 uint64_t prt3 : 4;
258 uint64_t oddpar : 1;
259 uint64_t reserved_17_63 : 47;
284 uint64_t u64;
287 uint64_t reserved_16_63 : 48;
288 uint64_t m : 8; /**< CALENDAR_M (from spi4.2 spec) */
289 uint64_t reserved_7_7 : 1;
290 uint64_t len : 7; /**< CALENDAR_LEN (from spi4.2 spec) */
292 uint64_t len : 7;
293 uint64_t reserved_7_7 : 1;
294 uint64_t m : 8;
295 uint64_t reserved_16_63 : 48;
312 uint64_t u64;
315 uint64_t reserved_14_63 : 50;
316 uint64_t eop : 1; /**< SW Tick EOP
318 uint64_t sop : 1; /**< SW Tick SOP
320 uint64_t mod : 4; /**< SW Tick MOD - valid byte count
322 uint64_t opc : 4; /**< SW Tick ERR - packet had an error
324 uint64_t adr : 4; /**< SW Tick port address
327 uint64_t adr : 4;
328 uint64_t opc : 4;
329 uint64_t mod : 4;
330 uint64_t sop : 1;
331 uint64_t eop : 1;
332 uint64_t reserved_14_63 : 50;
348 uint64_t u64;
351 uint64_t dat : 64; /**< Data tick when SRX_SW_TICK_CTL is written
354 uint64_t dat : 64;