Lines Matching refs:uint64_t
57 static inline uint64_t CVMX_L2C_BIG_CTL_FUNC(void)
68 static inline uint64_t CVMX_L2C_BST_FUNC(void)
79 static inline uint64_t CVMX_L2C_BST0_FUNC(void)
90 static inline uint64_t CVMX_L2C_BST1_FUNC(void)
101 static inline uint64_t CVMX_L2C_BST2_FUNC(void)
111 static inline uint64_t CVMX_L2C_BST_MEMX(unsigned long block_id)
126 static inline uint64_t CVMX_L2C_BST_TDTX(unsigned long block_id)
141 static inline uint64_t CVMX_L2C_BST_TTGX(unsigned long block_id)
157 static inline uint64_t CVMX_L2C_CFG_FUNC(void)
167 static inline uint64_t CVMX_L2C_COP0_MAPX(unsigned long offset)
183 static inline uint64_t CVMX_L2C_CTL_FUNC(void)
194 static inline uint64_t CVMX_L2C_DBG_FUNC(void)
205 static inline uint64_t CVMX_L2C_DUT_FUNC(void)
215 static inline uint64_t CVMX_L2C_DUT_MAPX(unsigned long offset)
230 static inline uint64_t CVMX_L2C_ERR_TDTX(unsigned long block_id)
245 static inline uint64_t CVMX_L2C_ERR_TTGX(unsigned long block_id)
260 static inline uint64_t CVMX_L2C_ERR_VBFX(unsigned long block_id)
276 static inline uint64_t CVMX_L2C_ERR_XMC_FUNC(void)
287 static inline uint64_t CVMX_L2C_GRPWRR0_FUNC(void)
298 static inline uint64_t CVMX_L2C_GRPWRR1_FUNC(void)
309 static inline uint64_t CVMX_L2C_INT_EN_FUNC(void)
320 static inline uint64_t CVMX_L2C_INT_ENA_FUNC(void)
331 static inline uint64_t CVMX_L2C_INT_REG_FUNC(void)
342 static inline uint64_t CVMX_L2C_INT_STAT_FUNC(void)
352 static inline uint64_t CVMX_L2C_IOCX_PFC(unsigned long block_id)
367 static inline uint64_t CVMX_L2C_IORX_PFC(unsigned long block_id)
383 static inline uint64_t CVMX_L2C_LCKBASE_FUNC(void)
394 static inline uint64_t CVMX_L2C_LCKOFF_FUNC(void)
405 static inline uint64_t CVMX_L2C_LFB0_FUNC(void)
416 static inline uint64_t CVMX_L2C_LFB1_FUNC(void)
427 static inline uint64_t CVMX_L2C_LFB2_FUNC(void)
438 static inline uint64_t CVMX_L2C_LFB3_FUNC(void)
449 static inline uint64_t CVMX_L2C_OOB_FUNC(void)
460 static inline uint64_t CVMX_L2C_OOB1_FUNC(void)
471 static inline uint64_t CVMX_L2C_OOB2_FUNC(void)
482 static inline uint64_t CVMX_L2C_OOB3_FUNC(void)
497 static inline uint64_t CVMX_L2C_PFCTL_FUNC(void)
507 static inline uint64_t CVMX_L2C_PFCX(unsigned long offset)
525 static inline uint64_t CVMX_L2C_PPGRP_FUNC(void)
535 static inline uint64_t CVMX_L2C_QOS_IOBX(unsigned long offset)
550 static inline uint64_t CVMX_L2C_QOS_PPX(unsigned long offset)
566 static inline uint64_t CVMX_L2C_QOS_WGT_FUNC(void)
576 static inline uint64_t CVMX_L2C_RSCX_PFC(unsigned long offset)
591 static inline uint64_t CVMX_L2C_RSDX_PFC(unsigned long offset)
607 static inline uint64_t CVMX_L2C_SPAR0_FUNC(void)
618 static inline uint64_t CVMX_L2C_SPAR1_FUNC(void)
629 static inline uint64_t CVMX_L2C_SPAR2_FUNC(void)
640 static inline uint64_t CVMX_L2C_SPAR3_FUNC(void)
651 static inline uint64_t CVMX_L2C_SPAR4_FUNC(void)
661 static inline uint64_t CVMX_L2C_TADX_ECC0(unsigned long block_id)
676 static inline uint64_t CVMX_L2C_TADX_ECC1(unsigned long block_id)
691 static inline uint64_t CVMX_L2C_TADX_IEN(unsigned long block_id)
706 static inline uint64_t CVMX_L2C_TADX_INT(unsigned long block_id)
721 static inline uint64_t CVMX_L2C_TADX_PFC0(unsigned long block_id)
736 static inline uint64_t CVMX_L2C_TADX_PFC1(unsigned long block_id)
751 static inline uint64_t CVMX_L2C_TADX_PFC2(unsigned long block_id)
766 static inline uint64_t CVMX_L2C_TADX_PFC3(unsigned long block_id)
781 static inline uint64_t CVMX_L2C_TADX_PRF(unsigned long block_id)
796 static inline uint64_t CVMX_L2C_TADX_TAG(unsigned long block_id)
812 static inline uint64_t CVMX_L2C_VER_ID_FUNC(void)
823 static inline uint64_t CVMX_L2C_VER_IOB_FUNC(void)
834 static inline uint64_t CVMX_L2C_VER_MSC_FUNC(void)
845 static inline uint64_t CVMX_L2C_VER_PP_FUNC(void)
855 static inline uint64_t CVMX_L2C_VIRTID_IOBX(unsigned long offset)
870 static inline uint64_t CVMX_L2C_VIRTID_PPX(unsigned long offset)
886 static inline uint64_t CVMX_L2C_VRT_CTL_FUNC(void)
896 static inline uint64_t CVMX_L2C_VRT_MEMX(unsigned long offset)
911 static inline uint64_t CVMX_L2C_WPAR_IOBX(unsigned long offset)
926 static inline uint64_t CVMX_L2C_WPAR_PPX(unsigned long offset)
941 static inline uint64_t CVMX_L2C_XMCX_PFC(unsigned long offset)
957 static inline uint64_t CVMX_L2C_XMC_CMD_FUNC(void)
967 static inline uint64_t CVMX_L2C_XMDX_PFC(unsigned long offset)
996 uint64_t u64;
999 uint64_t reserved_8_63 : 56;
1000 uint64_t maxdram : 4; /**< Amount of configured DRAM
1014 uint64_t reserved_1_3 : 3;
1015 uint64_t disable : 1; /**< When set, disables the BIGWR/BIGRD logic completely
1020 uint64_t disable : 1;
1021 uint64_t reserved_1_3 : 3;
1022 uint64_t maxdram : 4;
1023 uint64_t reserved_8_63 : 56;
1042 uint64_t u64;
1045 uint64_t dutfl : 32; /**< BIST failure status for PP0-3 DUT */
1046 uint64_t rbffl : 4; /**< BIST failure status for RBF0-3 */
1047 uint64_t xbffl : 4; /**< BIST failure status for XBF0-3 */
1048 uint64_t tdpfl : 4; /**< BIST failure status for TDP0-3 */
1049 uint64_t ioccmdfl : 4; /**< BIST failure status for IOCCMD */
1050 uint64_t iocdatfl : 4; /**< BIST failure status for IOCDAT */
1051 uint64_t dutresfl : 4; /**< BIST failure status for DUTRES */
1052 uint64_t vrtfl : 4; /**< BIST failure status for VRT0 */
1053 uint64_t tdffl : 4; /**< BIST failure status for TDF0 */
1055 uint64_t tdffl : 4;
1056 uint64_t vrtfl : 4;
1057 uint64_t dutresfl : 4;
1058 uint64_t iocdatfl : 4;
1059 uint64_t ioccmdfl : 4;
1060 uint64_t tdpfl : 4;
1061 uint64_t xbffl : 4;
1062 uint64_t rbffl : 4;
1063 uint64_t dutfl : 32;
1068 uint64_t reserved_36_63 : 28;
1069 uint64_t dutfl : 4; /**< BIST failure status for PP0-3 DUT */
1070 uint64_t reserved_17_31 : 15;
1071 uint64_t ioccmdfl : 1; /**< BIST failure status for IOCCMD */
1072 uint64_t reserved_13_15 : 3;
1073 uint64_t iocdatfl : 1; /**< BIST failure status for IOCDAT */
1074 uint64_t reserved_9_11 : 3;
1075 uint64_t dutresfl : 1; /**< BIST failure status for DUTRES */
1076 uint64_t reserved_5_7 : 3;
1077 uint64_t vrtfl : 1; /**< BIST failure status for VRT0 */
1078 uint64_t reserved_1_3 : 3;
1079 uint64_t tdffl : 1; /**< BIST failure status for TDF0 */
1081 uint64_t tdffl : 1;
1082 uint64_t reserved_1_3 : 3;
1083 uint64_t vrtfl : 1;
1084 uint64_t reserved_5_7 : 3;
1085 uint64_t dutresfl : 1;
1086 uint64_t reserved_9_11 : 3;
1087 uint64_t iocdatfl : 1;
1088 uint64_t reserved_13_15 : 3;
1089 uint64_t ioccmdfl : 1;
1090 uint64_t reserved_17_31 : 15;
1091 uint64_t dutfl : 4;
1092 uint64_t reserved_36_63 : 28;
1097 uint64_t reserved_38_63 : 26;
1098 uint64_t dutfl : 6; /**< BIST failure status for PP0-5 DUT */
1099 uint64_t reserved_17_31 : 15;
1100 uint64_t ioccmdfl : 1; /**< BIST failure status for IOCCMD */
1101 uint64_t reserved_13_15 : 3;
1102 uint64_t iocdatfl : 1; /**< BIST failure status for IOCDAT */
1103 uint64_t reserved_9_11 : 3;
1104 uint64_t dutresfl : 1; /**< BIST failure status for DUTRES */
1105 uint64_t reserved_5_7 : 3;
1106 uint64_t vrtfl : 1; /**< BIST failure status for VRT0 */
1107 uint64_t reserved_1_3 : 3;
1108 uint64_t tdffl : 1; /**< BIST failure status for TDF0 */
1110 uint64_t tdffl : 1;
1111 uint64_t reserved_1_3 : 3;
1112 uint64_t vrtfl : 1;
1113 uint64_t reserved_5_7 : 3;
1114 uint64_t dutresfl : 1;
1115 uint64_t reserved_9_11 : 3;
1116 uint64_t iocdatfl : 1;
1117 uint64_t reserved_13_15 : 3;
1118 uint64_t ioccmdfl : 1;
1119 uint64_t reserved_17_31 : 15;
1120 uint64_t dutfl : 6;
1121 uint64_t reserved_38_63 : 26;
1127 uint64_t reserved_42_63 : 22;
1128 uint64_t dutfl : 10; /**< BIST failure status for PP0-9 DUT */
1129 uint64_t reserved_17_31 : 15;
1130 uint64_t ioccmdfl : 1; /**< BIST failure status for IOCCMD */
1131 uint64_t reserved_13_15 : 3;
1132 uint64_t iocdatfl : 1; /**< BIST failure status for IOCDAT */
1133 uint64_t reserved_9_11 : 3;
1134 uint64_t dutresfl : 1; /**< BIST failure status for DUTRES */
1135 uint64_t reserved_5_7 : 3;
1136 uint64_t vrtfl : 1; /**< BIST failure status for VRT0 */
1137 uint64_t reserved_1_3 : 3;
1138 uint64_t tdffl : 1; /**< BIST failure status for TDF0 */
1140 uint64_t tdffl : 1;
1141 uint64_t reserved_1_3 : 3;
1142 uint64_t vrtfl : 1;
1143 uint64_t reserved_5_7 : 3;
1144 uint64_t dutresfl : 1;
1145 uint64_t reserved_9_11 : 3;
1146 uint64_t iocdatfl : 1;
1147 uint64_t reserved_13_15 : 3;
1148 uint64_t ioccmdfl : 1;
1149 uint64_t reserved_17_31 : 15;
1150 uint64_t dutfl : 10;
1151 uint64_t reserved_42_63 : 22;
1167 uint64_t u64;
1170 uint64_t reserved_24_63 : 40;
1171 uint64_t dtbnk : 1; /**< DuTag Bank#
1174 uint64_t wlb_msk : 4; /**< Bist Results for WLB-MSK RAM [DP0-3]
1177 uint64_t dtcnt : 13; /**< DuTag BiST Counter (used to help isolate the failure)
1182 uint64_t dt : 1; /**< Bist Results for DuTAG RAM(s)
1185 uint64_t stin_msk : 1; /**< Bist Results for STIN-MSK RAM
1188 uint64_t wlb_dat : 4; /**< Bist Results for WLB-DAT RAM [DP0-3]
1192 uint64_t wlb_dat : 4;
1193 uint64_t stin_msk : 1;
1194 uint64_t dt : 1;
1195 uint64_t dtcnt : 13;
1196 uint64_t wlb_msk : 4;
1197 uint64_t dtbnk : 1;
1198 uint64_t reserved_24_63 : 40;
1203 uint64_t reserved_23_63 : 41;
1204 uint64_t wlb_msk : 4; /**< Bist Results for WLB-MSK RAM [DP0-3]
1207 uint64_t reserved_15_18 : 4;
1208 uint64_t dtcnt : 9; /**< DuTag BiST Counter (used to help isolate the failure)
1212 uint64_t dt : 1; /**< Bist Results for DuTAG RAM(s)
1215 uint64_t reserved_4_4 : 1;
1216 uint64_t wlb_dat : 4; /**< Bist Results for WLB-DAT RAM [DP0-3]
1220 uint64_t wlb_dat : 4;
1221 uint64_t reserved_4_4 : 1;
1222 uint64_t dt : 1;
1223 uint64_t dtcnt : 9;
1224 uint64_t reserved_15_18 : 4;
1225 uint64_t wlb_msk : 4;
1226 uint64_t reserved_23_63 : 41;
1231 uint64_t reserved_23_63 : 41;
1232 uint64_t wlb_msk : 4; /**< Bist Results for WLB-MSK RAM [DP0-3]
1235 uint64_t reserved_16_18 : 3;
1236 uint64_t dtcnt : 10; /**< DuTag BiST Counter (used to help isolate the failure)
1241 uint64_t dt : 1; /**< Bist Results for DuTAG RAM(s)
1244 uint64_t stin_msk : 1; /**< Bist Results for STIN-MSK RAM
1247 uint64_t wlb_dat : 4; /**< Bist Results for WLB-DAT RAM [DP0-3]
1251 uint64_t wlb_dat : 4;
1252 uint64_t stin_msk : 1;
1253 uint64_t dt : 1;
1254 uint64_t dtcnt : 10;
1255 uint64_t reserved_16_18 : 3;
1256 uint64_t wlb_msk : 4;
1257 uint64_t reserved_23_63 : 41;
1262 uint64_t reserved_19_63 : 45;
1263 uint64_t dtcnt : 13; /**< DuTag BiST Counter (used to help isolate the failure)
1268 uint64_t dt : 1; /**< Bist Results for DuTAG RAM(s)
1271 uint64_t stin_msk : 1; /**< Bist Results for STIN-MSK RAM
1274 uint64_t wlb_dat : 4; /**< Bist Results for WLB-DAT RAM [DP0-3]
1278 uint64_t wlb_dat : 4;
1279 uint64_t stin_msk : 1;
1280 uint64_t dt : 1;
1281 uint64_t dtcnt : 13;
1282 uint64_t reserved_19_63 : 45;
1288 uint64_t reserved_24_63 : 40;
1289 uint64_t dtbnk : 1; /**< DuTag Bank#
1292 uint64_t wlb_msk : 4; /**< Bist Results for WLB-MSK RAM [DP0-3]
1295 uint64_t reserved_16_18 : 3;
1296 uint64_t dtcnt : 10; /**< DuTag BiST Counter (used to help isolate the failure)
1301 uint64_t dt : 1; /**< Bist Results for DuTAG RAM(s)
1304 uint64_t stin_msk : 1; /**< Bist Results for STIN-MSK RAM
1307 uint64_t wlb_dat : 4; /**< Bist Results for WLB-DAT RAM [DP0-3]
1311 uint64_t wlb_dat : 4;
1312 uint64_t stin_msk : 1;
1313 uint64_t dt : 1;
1314 uint64_t dtcnt : 10;
1315 uint64_t reserved_16_18 : 3;
1316 uint64_t wlb_msk : 4;
1317 uint64_t dtbnk : 1;
1318 uint64_t reserved_24_63 : 40;
1337 uint64_t u64;
1340 uint64_t reserved_9_63 : 55;
1341 uint64_t l2t : 9; /**< Bist Results for L2T (USE+8SET RAMs)
1345 uint64_t l2t : 9;
1346 uint64_t reserved_9_63 : 55;
1351 uint64_t reserved_16_63 : 48;
1352 uint64_t vwdf : 4; /**< Bist Results for VWDF RAMs
1355 uint64_t lrf : 2; /**< Bist Results for LRF RAMs (PLC+ILC)
1358 uint64_t vab_vwcf : 1; /**< Bist Results for VAB VWCF_MEM
1361 uint64_t reserved_5_8 : 4;
1362 uint64_t l2t : 5; /**< Bist Results for L2T (USE+4SET RAMs)
1366 uint64_t l2t : 5;
1367 uint64_t reserved_5_8 : 4;
1368 uint64_t vab_vwcf : 1;
1369 uint64_t lrf : 2;
1370 uint64_t vwdf : 4;
1371 uint64_t reserved_16_63 : 48;
1377 uint64_t reserved_16_63 : 48;
1378 uint64_t vwdf : 4; /**< Bist Results for VWDF RAMs
1381 uint64_t lrf : 2; /**< Bist Results for LRF RAMs (PLC+ILC)
1384 uint64_t vab_vwcf : 1; /**< Bist Results for VAB VWCF_MEM
1387 uint64_t l2t : 9; /**< Bist Results for L2T (USE+8SET RAMs)
1391 uint64_t l2t : 9;
1392 uint64_t vab_vwcf : 1;
1393 uint64_t lrf : 2;
1394 uint64_t vwdf : 4;
1395 uint64_t reserved_16_63 : 48;
1402 uint64_t reserved_19_63 : 45;
1403 uint64_t plc2 : 1; /**< Bist Results for PLC2 RAM
1406 uint64_t plc1 : 1; /**< Bist Results for PLC1 RAM
1409 uint64_t plc0 : 1; /**< Bist Results for PLC0 RAM
1412 uint64_t vwdf : 4; /**< Bist Results for VWDF RAMs
1415 uint64_t reserved_11_11 : 1;
1416 uint64_t ilc : 1; /**< Bist Results for ILC RAM
1419 uint64_t vab_vwcf : 1; /**< Bist Results for VAB VWCF_MEM
1422 uint64_t l2t : 9; /**< Bist Results for L2T (USE+8SET RAMs)
1426 uint64_t l2t : 9;
1427 uint64_t vab_vwcf : 1;
1428 uint64_t ilc : 1;
1429 uint64_t reserved_11_11 : 1;
1430 uint64_t vwdf : 4;
1431 uint64_t plc0 : 1;
1432 uint64_t plc1 : 1;
1433 uint64_t plc2 : 1;
1434 uint64_t reserved_19_63 : 45;
1440 uint64_t reserved_24_63 : 40;
1441 uint64_t plc2 : 1; /**< Bist Results for LRF RAMs (ILC)
1444 uint64_t plc1 : 1; /**< Bist Results for LRF RAMs (ILC)
1447 uint64_t plc0 : 1; /**< Bist Results for LRF RAMs (ILC)
1450 uint64_t ilc : 1; /**< Bist Results for LRF RAMs (ILC)
1453 uint64_t vwdf1 : 4; /**< Bist Results for VWDF1 RAMs
1456 uint64_t vwdf0 : 4; /**< Bist Results for VWDF0 RAMs
1459 uint64_t vab_vwcf1 : 1; /**< Bist Results for VAB VWCF1_MEM */
1460 uint64_t reserved_10_10 : 1;
1461 uint64_t vab_vwcf0 : 1; /**< Bist Results for VAB VWCF0_MEM
1464 uint64_t l2t : 9; /**< Bist Results for L2T (USE+8SET RAMs)
1468 uint64_t l2t : 9;
1469 uint64_t vab_vwcf0 : 1;
1470 uint64_t reserved_10_10 : 1;
1471 uint64_t vab_vwcf1 : 1;
1472 uint64_t vwdf0 : 4;
1473 uint64_t vwdf1 : 4;
1474 uint64_t ilc : 1;
1475 uint64_t plc0 : 1;
1476 uint64_t plc1 : 1;
1477 uint64_t plc2 : 1;
1478 uint64_t reserved_24_63 : 40;
1494 uint64_t u64;
1497 uint64_t reserved_16_63 : 48;
1498 uint64_t mrb : 4; /**< Bist Results for MRB RAMs
1501 uint64_t reserved_4_11 : 8;
1502 uint64_t ipcbst : 1; /**< Bist Results for RFB IPC RAM
1504 uint64_t picbst : 1; /**< Bist Results for RFB PIC RAM
1506 uint64_t xrdmsk : 1; /**< Bist Results for RFB XRD-MSK RAM
1509 uint64_t xrddat : 1; /**< Bist Results for RFB XRD-DAT RAM
1513 uint64_t xrddat : 1;
1514 uint64_t xrdmsk : 1;
1515 uint64_t picbst : 1;
1516 uint64_t ipcbst : 1;
1517 uint64_t reserved_4_11 : 8;
1518 uint64_t mrb : 4;
1519 uint64_t reserved_16_63 : 48;
1524 uint64_t reserved_16_63 : 48;
1525 uint64_t mrb : 4; /**< Bist Results for MRB RAMs
1528 uint64_t rmdf : 4; /**< Bist Results for RMDF RAMs
1531 uint64_t reserved_4_7 : 4;
1532 uint64_t ipcbst : 1; /**< Bist Results for RFB IPC RAM
1535 uint64_t reserved_2_2 : 1;
1536 uint64_t xrdmsk : 1; /**< Bist Results for RFB XRD-MSK RAM
1539 uint64_t xrddat : 1; /**< Bist Results for RFB XRD-DAT RAM
1543 uint64_t xrddat : 1;
1544 uint64_t xrdmsk : 1;
1545 uint64_t reserved_2_2 : 1;
1546 uint64_t ipcbst : 1;
1547 uint64_t reserved_4_7 : 4;
1548 uint64_t rmdf : 4;
1549 uint64_t mrb : 4;
1550 uint64_t reserved_16_63 : 48;
1556 uint64_t reserved_16_63 : 48;
1557 uint64_t mrb : 4; /**< Bist Results for MRB RAMs
1560 uint64_t rmdf : 4; /**< Bist Results for RMDF RAMs
1563 uint64_t rhdf : 4; /**< Bist Results for RHDF RAMs
1566 uint64_t ipcbst : 1; /**< Bist Results for RFB IPC RAM
1568 uint64_t picbst : 1; /**< Bist Results for RFB PIC RAM
1570 uint64_t xrdmsk : 1; /**< Bist Results for RFB XRD-MSK RAM
1573 uint64_t xrddat : 1; /**< Bist Results for RFB XRD-DAT RAM
1577 uint64_t xrddat : 1;
1578 uint64_t xrdmsk : 1;
1579 uint64_t picbst : 1;
1580 uint64_t ipcbst : 1;
1581 uint64_t rhdf : 4;
1582 uint64_t rmdf : 4;
1583 uint64_t mrb : 4;
1584 uint64_t reserved_16_63 : 48;
1593 uint64_t reserved_16_63 : 48;
1594 uint64_t mrb : 4; /**< Bist Results for MRB RAMs
1597 uint64_t rmdb : 4; /**< Bist Results for RMDB RAMs
1600 uint64_t rhdb : 4; /**< Bist Results for RHDB RAMs
1603 uint64_t ipcbst : 1; /**< Bist Results for RFB IPC RAM
1605 uint64_t picbst : 1; /**< Bist Results for RFB PIC RAM
1607 uint64_t xrdmsk : 1; /**< Bist Results for RFB XRD-MSK RAM
1610 uint64_t xrddat : 1; /**< Bist Results for RFB XRD-DAT RAM
1614 uint64_t xrddat : 1;
1615 uint64_t xrdmsk : 1;
1616 uint64_t picbst : 1;
1617 uint64_t ipcbst : 1;
1618 uint64_t rhdb : 4;
1619 uint64_t rmdb : 4;
1620 uint64_t mrb : 4;
1621 uint64_t reserved_16_63 : 48;
1643 uint64_t u64;
1646 uint64_t start_bist : 1; /**< When written to 1, starts BIST. Will read 1 until
1648 uint64_t clear_bist : 1; /**< When BIST is triggered, run clear BIST (see Note) */
1649 uint64_t reserved_5_61 : 57;
1650 uint64_t rdffl : 1; /**< BIST failure status for RDF */
1651 uint64_t vbffl : 4; /**< BIST failure status for VBF0-3 */
1653 uint64_t vbffl : 4;
1654 uint64_t rdffl : 1;
1655 uint64_t reserved_5_61 : 57;
1656 uint64_t clear_bist : 1;
1657 uint64_t start_bist : 1;
1677 uint64_t u64;
1680 uint64_t reserved_32_63 : 32;
1681 uint64_t fbfrspfl : 8; /**< BIST failure status for quad 0-7 FBF RSP read port */
1682 uint64_t sbffl : 8; /**< BIST failure status for quad 0-7 SBF */
1683 uint64_t fbffl : 8; /**< BIST failure status for quad 0-7 FBF WRP read port */
1684 uint64_t l2dfl : 8; /**< BIST failure status for quad 0-7 L2D */
1686 uint64_t l2dfl : 8;
1687 uint64_t fbffl : 8;
1688 uint64_t sbffl : 8;
1689 uint64_t fbfrspfl : 8;
1690 uint64_t reserved_32_63 : 32;
1697 uint64_t reserved_24_63 : 40;
1698 uint64_t sbffl : 8; /**< BIST failure status for quad 0-7 SBF */
1699 uint64_t fbffl : 8; /**< BIST failure status for quad 0-7 FBF */
1700 uint64_t l2dfl : 8; /**< BIST failure status for quad 0-7 L2D */
1702 uint64_t l2dfl : 8;
1703 uint64_t fbffl : 8;
1704 uint64_t sbffl : 8;
1705 uint64_t reserved_24_63 : 40;
1722 uint64_t u64;
1725 uint64_t reserved_17_63 : 47;
1726 uint64_t lrufl : 1; /**< BIST failure status for tag LRU */
1727 uint64_t tagfl : 16; /**< BIST failure status for tag ways 0-15 */
1729 uint64_t tagfl : 16;
1730 uint64_t lrufl : 1;
1731 uint64_t reserved_17_63 : 47;
1754 uint64_t u64;
1757 uint64_t reserved_20_63 : 44;
1758 uint64_t bstrun : 1; /**< L2 Data Store Bist Running
1761 uint64_t lbist : 1; /**< L2C Data Store Long Bist Sequence
1772 uint64_t xor_bank : 1; /**< L2C XOR Bank Bit
1783 uint64_t dpres1 : 1; /**< DDR1 Present/LMC1 Enable
1793 uint64_t dpres0 : 1; /**< DDR0 Present/LMC0 Enable
1803 uint64_t dfill_dis : 1; /**< L2C Dual Fill Disable
1809 uint64_t fpexp : 4; /**< [CYA] Forward Progress Counter Exponent
1823 uint64_t fpempty : 1; /**< [CYA] Forward Progress Counter Empty
1837 uint64_t fpen : 1; /**< [CYA] Forward Progress Counter Enable
1842 uint64_t idxalias : 1; /**< L2C Index Alias Enable
1855 uint64_t mwf_crd : 4; /**< MWF Credit Threshold: When the remaining MWF credits
1859 uint64_t rsp_arb_mode : 1; /**< RSP Arbitration Mode:
1864 uint64_t rfb_arb_mode : 1; /**< RFB Arbitration Mode:
1871 uint64_t lrf_arb_mode : 1; /**< RF Arbitration Mode:
1879 uint64_t lrf_arb_mode : 1;
1880 uint64_t rfb_arb_mode : 1;
1881 uint64_t rsp_arb_mode : 1;
1882 uint64_t mwf_crd : 4;
1883 uint64_t idxalias : 1;
1884 uint64_t fpen : 1;
1885 uint64_t fpempty : 1;
1886 uint64_t fpexp : 4;
1887 uint64_t dfill_dis : 1;
1888 uint64_t dpres0 : 1;
1889 uint64_t dpres1 : 1;
1890 uint64_t xor_bank : 1;
1891 uint64_t lbist : 1;
1892 uint64_t bstrun : 1;
1893 uint64_t reserved_20_63 : 44;
1898 uint64_t reserved_14_63 : 50;
1899 uint64_t fpexp : 4; /**< [CYA] Forward Progress Counter Exponent
1913 uint64_t fpempty : 1; /**< [CYA] Forward Progress Counter Empty
1927 uint64_t fpen : 1; /**< [CYA] Forward Progress Counter Enable
1932 uint64_t idxalias : 1; /**< L2C Index Alias Enable
1945 uint64_t mwf_crd : 4; /**< MWF Credit Threshold: When the remaining MWF credits
1949 uint64_t rsp_arb_mode : 1; /**< RSP Arbitration Mode:
1954 uint64_t rfb_arb_mode : 1; /**< RFB Arbitration Mode:
1961 uint64_t lrf_arb_mode : 1; /**< RF Arbitration Mode:
1969 uint64_t lrf_arb_mode : 1;
1970 uint64_t rfb_arb_mode : 1;
1971 uint64_t rsp_arb_mode : 1;
1972 uint64_t mwf_crd : 4;
1973 uint64_t idxalias : 1;
1974 uint64_t fpen : 1;
1975 uint64_t fpempty : 1;
1976 uint64_t fpexp : 4;
1977 uint64_t reserved_14_63 : 50;
1985 uint64_t reserved_20_63 : 44;
1986 uint64_t bstrun : 1; /**< L2 Data Store Bist Running
1989 uint64_t lbist : 1; /**< L2C Data Store Long Bist Sequence
1998 uint64_t reserved_14_17 : 4;
1999 uint64_t fpexp : 4; /**< [CYA] Forward Progress Counter Exponent
2013 uint64_t fpempty : 1; /**< [CYA] Forward Progress Counter Empty
2027 uint64_t fpen : 1; /**< [CYA] Forward Progress Counter Enable
2032 uint64_t idxalias : 1; /**< L2C Index Alias Enable
2045 uint64_t mwf_crd : 4; /**< MWF Credit Threshold: When the remaining MWF credits
2049 uint64_t rsp_arb_mode : 1; /**< RSP Arbitration Mode:
2054 uint64_t rfb_arb_mode : 1; /**< RFB Arbitration Mode:
2061 uint64_t lrf_arb_mode : 1; /**< RF Arbitration Mode:
2069 uint64_t lrf_arb_mode : 1;
2070 uint64_t rfb_arb_mode : 1;
2071 uint64_t rsp_arb_mode : 1;
2072 uint64_t mwf_crd : 4;
2073 uint64_t idxalias : 1;
2074 uint64_t fpen : 1;
2075 uint64_t fpempty : 1;
2076 uint64_t fpexp : 4;
2077 uint64_t reserved_14_17 : 4;
2078 uint64_t lbist : 1;
2079 uint64_t bstrun : 1;
2080 uint64_t reserved_20_63 : 44;
2089 uint64_t reserved_20_63 : 44;
2090 uint64_t bstrun : 1; /**< L2 Data Store Bist Running
2093 uint64_t lbist : 1; /**< L2C Data Store Long Bist Sequence
2104 uint64_t reserved_15_17 : 3;
2105 uint64_t dfill_dis : 1; /**< L2C Dual Fill Disable
2111 uint64_t fpexp : 4; /**< [CYA] Forward Progress Counter Exponent
2125 uint64_t fpempty : 1; /**< [CYA] Forward Progress Counter Empty
2139 uint64_t fpen : 1; /**< [CYA] Forward Progress Counter Enable
2144 uint64_t idxalias : 1; /**< L2C Index Alias Enable
2157 uint64_t mwf_crd : 4; /**< MWF Credit Threshold: When the remaining MWF credits
2161 uint64_t rsp_arb_mode : 1; /**< RSP Arbitration Mode:
2166 uint64_t rfb_arb_mode : 1; /**< RFB Arbitration Mode:
2173 uint64_t lrf_arb_mode : 1; /**< RF Arbitration Mode:
2181 uint64_t lrf_arb_mode : 1;
2182 uint64_t rfb_arb_mode : 1;
2183 uint64_t rsp_arb_mode : 1;
2184 uint64_t mwf_crd : 4;
2185 uint64_t idxalias : 1;
2186 uint64_t fpen : 1;
2187 uint64_t fpempty : 1;
2188 uint64_t fpexp : 4;
2189 uint64_t dfill_dis : 1;
2190 uint64_t reserved_15_17 : 3;
2191 uint64_t lbist : 1;
2192 uint64_t bstrun : 1;
2193 uint64_t reserved_20_63 : 44;
2198 uint64_t reserved_15_63 : 49;
2199 uint64_t dfill_dis : 1; /**< L2C Dual Fill Disable
2205 uint64_t fpexp : 4; /**< [CYA] Forward Progress Counter Exponent
2219 uint64_t fpempty : 1; /**< [CYA] Forward Progress Counter Empty
2233 uint64_t fpen : 1; /**< [CYA] Forward Progress Counter Enable
2238 uint64_t idxalias : 1; /**< L2C Index Alias Enable
2251 uint64_t mwf_crd : 4; /**< MWF Credit Threshold: When the remaining MWF credits
2255 uint64_t rsp_arb_mode : 1; /**< RSP Arbitration Mode:
2260 uint64_t rfb_arb_mode : 1; /**< RFB Arbitration Mode:
2267 uint64_t lrf_arb_mode : 1; /**< RF Arbitration Mode:
2275 uint64_t lrf_arb_mode : 1;
2276 uint64_t rfb_arb_mode : 1;
2277 uint64_t rsp_arb_mode : 1;
2278 uint64_t mwf_crd : 4;
2279 uint64_t idxalias : 1;
2280 uint64_t fpen : 1;
2281 uint64_t fpempty : 1;
2282 uint64_t fpexp : 4;
2283 uint64_t dfill_dis : 1;
2284 uint64_t reserved_15_63 : 49;
2394 uint64_t u64;
2397 uint64_t data : 64; /**< Data to write to/read from designated PP's COP0
2400 uint64_t data : 64;
2437 uint64_t u64;
2440 uint64_t reserved_30_63 : 34;
2441 uint64_t sepcmt : 1; /**< Sends all invals before the corresponding commit. */
2442 uint64_t rdf_fast : 1; /**< When 0, delay read data fifo from DCLK to RCLK by one
2446 uint64_t disstgl2i : 1; /**< Disable STGL2I's from changing the tags */
2447 uint64_t l2dfsbe : 1; /**< Force single bit ECC error on PL2 allocates (2) */
2448 uint64_t l2dfdbe : 1; /**< Force double bit ECC error on PL2 allocates (2) */
2449 uint64_t discclk : 1; /**< Disable conditional clocking in L2C PNR blocks */
2450 uint64_t maxvab : 4; /**< Maximum VABs in use at once
2452 uint64_t maxlfb : 4; /**< Maximum LFBs in use at once
2454 uint64_t rsp_arb_mode : 1; /**< Arbitration mode for RSC/RSD bus
2460 uint64_t xmc_arb_mode : 1; /**< Arbitration mode for XMC QOS queues
2463 uint64_t ef_ena : 1; /**< LMC early fill enable */
2464 uint64_t ef_cnt : 7; /**< LMC early fill count
2485 uint64_t vab_thresh : 4; /**< VAB Threshold
2488 uint64_t disecc : 1; /**< Tag and Data ECC Disable */
2489 uint64_t disidxalias : 1; /**< Index Alias Disable */
2491 uint64_t disidxalias : 1;
2492 uint64_t disecc : 1;
2493 uint64_t vab_thresh : 4;
2494 uint64_t ef_cnt : 7;
2495 uint64_t ef_ena : 1;
2496 uint64_t xmc_arb_mode : 1;
2497 uint64_t rsp_arb_mode : 1;
2498 uint64_t maxlfb : 4;
2499 uint64_t maxvab : 4;
2500 uint64_t discclk : 1;
2501 uint64_t l2dfdbe : 1;
2502 uint64_t l2dfsbe : 1;
2503 uint64_t disstgl2i : 1;
2504 uint64_t rdf_fast : 1;
2505 uint64_t sepcmt : 1;
2506 uint64_t reserved_30_63 : 34;
2511 uint64_t reserved_29_63 : 35;
2512 uint64_t rdf_fast : 1; /**< When 0, delay read data fifo from DCLK to RCLK by one
2516 uint64_t disstgl2i : 1; /**< Disable STGL2I's from changing the tags */
2517 uint64_t l2dfsbe : 1; /**< Force single bit ECC error on PL2 allocates (2) */
2518 uint64_t l2dfdbe : 1; /**< Force double bit ECC error on PL2 allocates (2) */
2519 uint64_t discclk : 1; /**< Disable conditional clocking in L2C PNR blocks */
2520 uint64_t maxvab : 4; /**< Maximum VABs in use at once
2522 uint64_t maxlfb : 4; /**< Maximum LFBs in use at once
2524 uint64_t rsp_arb_mode : 1; /**< Arbitration mode for RSC/RSD bus
2530 uint64_t xmc_arb_mode : 1; /**< Arbitration mode for XMC QOS queues
2533 uint64_t ef_ena : 1; /**< LMC early fill enable */
2534 uint64_t ef_cnt : 7; /**< LMC early fill count
2555 uint64_t vab_thresh : 4; /**< VAB Threshold
2558 uint64_t disecc : 1; /**< Tag and Data ECC Disable */
2559 uint64_t disidxalias : 1; /**< Index Alias Disable */
2561 uint64_t disidxalias : 1;
2562 uint64_t disecc : 1;
2563 uint64_t vab_thresh : 4;
2564 uint64_t ef_cnt : 7;
2565 uint64_t ef_ena : 1;
2566 uint64_t xmc_arb_mode : 1;
2567 uint64_t rsp_arb_mode : 1;
2568 uint64_t maxlfb : 4;
2569 uint64_t maxvab : 4;
2570 uint64_t discclk : 1;
2571 uint64_t l2dfdbe : 1;
2572 uint64_t l2dfsbe : 1;
2573 uint64_t disstgl2i : 1;
2574 uint64_t rdf_fast : 1;
2575 uint64_t reserved_29_63 : 35;
2580 uint64_t reserved_28_63 : 36;
2581 uint64_t disstgl2i : 1; /**< Disable STGL2I's from changing the tags */
2582 uint64_t l2dfsbe : 1; /**< Force single bit ECC error on PL2 allocates (2) */
2583 uint64_t l2dfdbe : 1; /**< Force double bit ECC error on PL2 allocates (2) */
2584 uint64_t discclk : 1; /**< Disable conditional clocking in L2C PNR blocks */
2585 uint64_t maxvab : 4; /**< Maximum VABs in use at once
2587 uint64_t maxlfb : 4; /**< Maximum LFBs in use at once
2589 uint64_t rsp_arb_mode : 1; /**< Arbitration mode for RSC/RSD bus
2595 uint64_t xmc_arb_mode : 1; /**< Arbitration mode for XMC QOS queues
2598 uint64_t ef_ena : 1; /**< LMC early fill enable */
2599 uint64_t ef_cnt : 7; /**< LMC early fill count
2619 uint64_t vab_thresh : 4; /**< VAB Threshold
2622 uint64_t disecc : 1; /**< Tag and Data ECC Disable */
2623 uint64_t disidxalias : 1; /**< Index Alias Disable */
2625 uint64_t disidxalias : 1;
2626 uint64_t disecc : 1;
2627 uint64_t vab_thresh : 4;
2628 uint64_t ef_cnt : 7;
2629 uint64_t ef_ena : 1;
2630 uint64_t xmc_arb_mode : 1;
2631 uint64_t rsp_arb_mode : 1;
2632 uint64_t maxlfb : 4;
2633 uint64_t maxvab : 4;
2634 uint64_t discclk : 1;
2635 uint64_t l2dfdbe : 1;
2636 uint64_t l2dfsbe : 1;
2637 uint64_t disstgl2i : 1;
2638 uint64_t reserved_28_63 : 36;
2643 uint64_t reserved_25_63 : 39;
2644 uint64_t discclk : 1; /**< Disable conditional clocking in L2C PNR blocks */
2645 uint64_t maxvab : 4; /**< Maximum VABs in use at once
2647 uint64_t maxlfb : 4; /**< Maximum LFBs in use at once
2649 uint64_t rsp_arb_mode : 1; /**< Arbitration mode for RSC/RSD bus
2655 uint64_t xmc_arb_mode : 1; /**< Arbitration mode for XMC QOS queues
2658 uint64_t ef_ena : 1; /**< LMC early fill enable */
2659 uint64_t ef_cnt : 7; /**< LMC early fill count
2679 uint64_t vab_thresh : 4; /**< VAB Threshold
2682 uint64_t disecc : 1; /**< Tag and Data ECC Disable */
2683 uint64_t disidxalias : 1; /**< Index Alias Disable */
2685 uint64_t disidxalias : 1;
2686 uint64_t disecc : 1;
2687 uint64_t vab_thresh : 4;
2688 uint64_t ef_cnt : 7;
2689 uint64_t ef_ena : 1;
2690 uint64_t xmc_arb_mode : 1;
2691 uint64_t rsp_arb_mode : 1;
2692 uint64_t maxlfb : 4;
2693 uint64_t maxvab : 4;
2694 uint64_t discclk : 1;
2695 uint64_t reserved_25_63 : 39;
2721 uint64_t u64;
2724 uint64_t reserved_15_63 : 49;
2725 uint64_t lfb_enum : 4; /**< Specifies the LFB Entry# which is to be captured. */
2726 uint64_t lfb_dmp : 1; /**< LFB Dump Enable: When written(=1), the contents of
2732 uint64_t ppnum : 4; /**< When L2C_DBG[L2T] or L2C_DBG[L2D] or L2C_DBG[FINV]
2735 uint64_t set : 3; /**< When L2C_DBG[L2T] or L2C_DBG[L2D] or L2C_DBG[FINV]
2741 uint64_t finv : 1; /**< Flush-Invalidate.
2771 uint64_t l2d : 1; /**< When enabled (and L2C_DBG[L2T]=0), fill data is
2781 uint64_t l2t : 1; /**< When enabled, L2 Tag information [V,D,L,U,phys_addr[33:18]]
2807 uint64_t l2t : 1;
2808 uint64_t l2d : 1;
2809 uint64_t finv : 1;
2810 uint64_t set : 3;
2811 uint64_t ppnum : 4;
2812 uint64_t lfb_dmp : 1;
2813 uint64_t lfb_enum : 4;
2814 uint64_t reserved_15_63 : 49;
2819 uint64_t reserved_13_63 : 51;
2820 uint64_t lfb_enum : 2; /**< Specifies the LFB Entry# which is to be captured. */
2821 uint64_t lfb_dmp : 1; /**< LFB Dump Enable: When written(=1), the contents of
2827 uint64_t reserved_7_9 : 3;
2828 uint64_t ppnum : 1; /**< When L2C_DBG[L2T] or L2C_DBG[L2D] or L2C_DBG[FINV]
2832 uint64_t reserved_5_5 : 1;
2833 uint64_t set : 2; /**< When L2C_DBG[L2T] or L2C_DBG[L2D] or L2C_DBG[FINV]
2839 uint64_t finv : 1; /**< Flush-Invalidate.
2868 uint64_t l2d : 1; /**< When enabled (and L2C_DBG[L2T]=0), fill data is
2878 uint64_t l2t : 1; /**< When enabled, L2 Tag information [V,D,L,U,phys_addr[33:15]]
2901 uint64_t l2t : 1;
2902 uint64_t l2d : 1;
2903 uint64_t finv : 1;
2904 uint64_t set : 2;
2905 uint64_t reserved_5_5 : 1;
2906 uint64_t ppnum : 1;
2907 uint64_t reserved_7_9 : 3;
2908 uint64_t lfb_dmp : 1;
2909 uint64_t lfb_enum : 2;
2910 uint64_t reserved_13_63 : 51;
2915 uint64_t reserved_14_63 : 50;
2916 uint64_t lfb_enum : 3; /**< Specifies the LFB Entry# which is to be captured. */
2917 uint64_t lfb_dmp : 1; /**< LFB Dump Enable: When written(=1), the contents of
2923 uint64_t reserved_7_9 : 3;
2924 uint64_t ppnum : 1; /**< When L2C_DBG[L2T] or L2C_DBG[L2D] or L2C_DBG[FINV]
2927 uint64_t reserved_5_5 : 1;
2928 uint64_t set : 2; /**< When L2C_DBG[L2T] or L2C_DBG[L2D] or L2C_DBG[FINV]
2934 uint64_t finv : 1; /**< Flush-Invalidate.
2964 uint64_t l2d : 1; /**< When enabled (and L2C_DBG[L2T]=0), fill data is
2973 uint64_t l2t : 1; /**< When enabled, L2 Tag information [V,D,L,U,phys_addr[33:16]]
2998 uint64_t l2t : 1;
2999 uint64_t l2d : 1;
3000 uint64_t finv : 1;
3001 uint64_t set : 2;
3002 uint64_t reserved_5_5 : 1;
3003 uint64_t ppnum : 1;
3004 uint64_t reserved_7_9 : 3;
3005 uint64_t lfb_dmp : 1;
3006 uint64_t lfb_enum : 3;
3007 uint64_t reserved_14_63 : 50;
3014 uint64_t reserved_14_63 : 50;
3015 uint64_t lfb_enum : 3; /**< Specifies the LFB Entry# which is to be captured. */
3016 uint64_t lfb_dmp : 1; /**< LFB Dump Enable: When written(=1), the contents of
3022 uint64_t reserved_7_9 : 3;
3023 uint64_t ppnum : 1; /**< When L2C_DBG[L2T] or L2C_DBG[L2D] or L2C_DBG[FINV]
3026 uint64_t set : 3; /**< When L2C_DBG[L2T] or L2C_DBG[L2D] or L2C_DBG[FINV]
3032 uint64_t finv : 1; /**< Flush-Invalidate.
3062 uint64_t l2d : 1; /**< When enabled (and L2C_DBG[L2T]=0), fill data is
3072 uint64_t l2t : 1; /**< When enabled, L2 Tag information [V,D,L,U,phys_addr[33:14]]
3096 uint64_t l2t : 1;
3097 uint64_t l2d : 1;
3098 uint64_t finv : 1;
3099 uint64_t set : 3;
3100 uint64_t ppnum : 1;
3101 uint64_t reserved_7_9 : 3;
3102 uint64_t lfb_dmp : 1;
3103 uint64_t lfb_enum : 3;
3104 uint64_t reserved_14_63 : 50;
3109 uint64_t reserved_14_63 : 50;
3110 uint64_t lfb_enum : 3; /**< Specifies the LFB Entry# which is to be captured. */
3111 uint64_t lfb_dmp : 1; /**< LFB Dump Enable: When written(=1), the contents of
3117 uint64_t reserved_8_9 : 2;
3118 uint64_t ppnum : 2; /**< When L2C_DBG[L2T] or L2C_DBG[L2D] or L2C_DBG[FINV]
3121 uint64_t set : 3; /**< When L2C_DBG[L2T] or L2C_DBG[L2D] or L2C_DBG[FINV]
3127 uint64_t finv : 1; /**< Flush-Invalidate.
3157 uint64_t l2d : 1; /**< When enabled (and L2C_DBG[L2T]=0), fill data is
3167 uint64_t l2t : 1; /**< When enabled, L2 Tag information [V,D,L,U,phys_addr[33:16]]
3191 uint64_t l2t : 1;
3192 uint64_t l2d : 1;
3193 uint64_t finv : 1;
3194 uint64_t set : 3;
3195 uint64_t ppnum : 2;
3196 uint64_t reserved_8_9 : 2;
3197 uint64_t lfb_dmp : 1;
3198 uint64_t lfb_enum : 3;
3199 uint64_t reserved_14_63 : 50;
3226 uint64_t u64;
3229 uint64_t reserved_32_63 : 32;
3230 uint64_t dtena : 1; /**< DuTag Diagnostic read enable.
3257 uint64_t reserved_30_30 : 1;
3258 uint64_t dt_vld : 1; /**< Duplicate L1 Tag Valid bit latched in for previous
3260 uint64_t dt_tag : 29; /**< Duplicate L1 Tag[35:7] latched in for previous
3263 uint64_t dt_tag : 29;
3264 uint64_t dt_vld : 1;
3265 uint64_t reserved_30_30 : 1;
3266 uint64_t dtena : 1;
3267 uint64_t reserved_32_63 : 32;
3307 uint64_t u64;
3310 uint64_t reserved_38_63 : 26;
3311 uint64_t tag : 28; /**< The tag value (see Note 1) */
3312 uint64_t reserved_1_9 : 9;
3313 uint64_t valid : 1; /**< The valid bit */
3315 uint64_t valid : 1;
3316 uint64_t reserved_1_9 : 9;
3317 uint64_t tag : 28;
3318 uint64_t reserved_38_63 : 26;
3355 uint64_t u64;
3358 uint64_t dbe : 1; /**< L2D Double-Bit error has occurred */
3359 uint64_t sbe : 1; /**< L2D Single-Bit error has occurred */
3360 uint64_t vdbe : 1; /**< VBF Double-Bit error has occurred */
3361 uint64_t vsbe : 1; /**< VBF Single-Bit error has occurred */
3362 uint64_t syn : 10; /**< L2D syndrome (valid only for SBE/DBE, not VSBE/VDBE) */
3363 uint64_t reserved_22_49 : 28;
3364 uint64_t wayidx : 18; /**< Way, index, OW of the L2 block containing the error */
3365 uint64_t reserved_2_3 : 2;
3366 uint64_t type : 2; /**< The type of error the WAYIDX,SYN were latched for.
3372 uint64_t type : 2;
3373 uint64_t reserved_2_3 : 2;
3374 uint64_t wayidx : 18;
3375 uint64_t reserved_22_49 : 28;
3376 uint64_t syn : 10;
3377 uint64_t vsbe : 1;
3378 uint64_t vdbe : 1;
3379 uint64_t sbe : 1;
3380 uint64_t dbe : 1;
3385 uint64_t dbe : 1; /**< L2D Double-Bit error has occurred */
3386 uint64_t sbe : 1; /**< L2D Single-Bit error has occurred */
3387 uint64_t vdbe : 1; /**< VBF Double-Bit error has occurred */
3388 uint64_t vsbe : 1; /**< VBF Single-Bit error has occurred */
3389 uint64_t syn : 10; /**< L2D syndrome (valid only for SBE/DBE, not VSBE/VDBE) */
3390 uint64_t reserved_20_49 : 30;
3391 uint64_t wayidx : 16; /**< Way, index, OW of the L2 block containing the error */
3392 uint64_t reserved_2_3 : 2;
3393 uint64_t type : 2; /**< The type of error the WAYIDX,SYN were latched for.
3399 uint64_t type : 2;
3400 uint64_t reserved_2_3 : 2;
3401 uint64_t wayidx : 16;
3402 uint64_t reserved_20_49 : 30;
3403 uint64_t syn : 10;
3404 uint64_t vsbe : 1;
3405 uint64_t vdbe : 1;
3406 uint64_t sbe : 1;
3407 uint64_t dbe : 1;
3412 uint64_t dbe : 1; /**< L2D Double-Bit error has occurred */
3413 uint64_t sbe : 1; /**< L2D Single-Bit error has occurred */
3414 uint64_t vdbe : 1; /**< VBF Double-Bit error has occurred */
3415 uint64_t vsbe : 1; /**< VBF Single-Bit error has occurred */
3416 uint64_t syn : 10; /**< L2D syndrome (valid only for SBE/DBE, not VSBE/VDBE) */
3417 uint64_t reserved_21_49 : 29;
3418 uint64_t wayidx : 17; /**< Way, index, OW of the L2 block containing the error */
3419 uint64_t reserved_2_3 : 2;
3420 uint64_t type : 2; /**< The type of error the WAYIDX,SYN were latched for.
3426 uint64_t type : 2;
3427 uint64_t reserved_2_3 : 2;
3428 uint64_t wayidx : 17;
3429 uint64_t reserved_21_49 : 29;
3430 uint64_t syn : 10;
3431 uint64_t vsbe : 1;
3432 uint64_t vdbe : 1;
3433 uint64_t sbe : 1;
3434 uint64_t dbe : 1;
3468 uint64_t u64;
3471 uint64_t dbe : 1; /**< Double-Bit ECC error */
3472 uint64_t sbe : 1; /**< Single-Bit ECC error */
3473 uint64_t noway : 1; /**< No way was available for allocation.
3487 uint64_t reserved_56_60 : 5;
3488 uint64_t syn : 6; /**< Syndrome for the single-bit error */
3489 uint64_t reserved_22_49 : 28;
3490 uint64_t wayidx : 15; /**< Way and index of the L2 block containing the error */
3491 uint64_t reserved_2_6 : 5;
3492 uint64_t type : 2; /**< The type of error the WAYIDX,SYN were latched for.
3498 uint64_t type : 2;
3499 uint64_t reserved_2_6 : 5;
3500 uint64_t wayidx : 15;
3501 uint64_t reserved_22_49 : 28;
3502 uint64_t syn : 6;
3503 uint64_t reserved_56_60 : 5;
3504 uint64_t noway : 1;
3505 uint64_t sbe : 1;
3506 uint64_t dbe : 1;
3511 uint64_t dbe : 1; /**< Double-Bit ECC error */
3512 uint64_t sbe : 1; /**< Single-Bit ECC error */
3513 uint64_t noway : 1; /**< No way was available for allocation.
3527 uint64_t reserved_56_60 : 5;
3528 uint64_t syn : 6; /**< Syndrome for the single-bit error */
3529 uint64_t reserved_20_49 : 30;
3530 uint64_t wayidx : 13; /**< Way and index of the L2 block containing the error */
3531 uint64_t reserved_2_6 : 5;
3532 uint64_t type : 2; /**< The type of error the WAYIDX,SYN were latched for.
3538 uint64_t type : 2;
3539 uint64_t reserved_2_6 : 5;
3540 uint64_t wayidx : 13;
3541 uint64_t reserved_20_49 : 30;
3542 uint64_t syn : 6;
3543 uint64_t reserved_56_60 : 5;
3544 uint64_t noway : 1;
3545 uint64_t sbe : 1;
3546 uint64_t dbe : 1;
3551 uint64_t dbe : 1; /**< Double-Bit ECC error */
3552 uint64_t sbe : 1; /**< Single-Bit ECC error */
3553 uint64_t noway : 1; /**< No way was available for allocation.
3567 uint64_t reserved_56_60 : 5;
3568 uint64_t syn : 6; /**< Syndrome for the single-bit error */
3569 uint64_t reserved_21_49 : 29;
3570 uint64_t wayidx : 14; /**< Way and index of the L2 block containing the error */
3571 uint64_t reserved_2_6 : 5;
3572 uint64_t type : 2; /**< The type of error the WAYIDX,SYN were latched for.
3578 uint64_t type : 2;
3579 uint64_t reserved_2_6 : 5;
3580 uint64_t wayidx : 14;
3581 uint64_t reserved_21_49 : 29;
3582 uint64_t syn : 6;
3583 uint64_t reserved_56_60 : 5;
3584 uint64_t noway : 1;
3585 uint64_t sbe : 1;
3586 uint64_t dbe : 1;
3621 uint64_t u64;
3624 uint64_t reserved_62_63 : 2;
3625 uint64_t vdbe : 1; /**< VBF Double-Bit error has occurred */
3626 uint64_t vsbe : 1; /**< VBF Single-Bit error has occurred */
3627 uint64_t vsyn : 10; /**< VBF syndrome (valid only if VSBE/VDBE is set) */
3628 uint64_t reserved_2_49 : 48;
3629 uint64_t type : 2; /**< The type of error the SYN were latched for.
3633 uint64_t type : 2;
3634 uint64_t reserved_2_49 : 48;
3635 uint64_t vsyn : 10;
3636 uint64_t vsbe : 1;
3637 uint64_t vdbe : 1;
3638 uint64_t reserved_62_63 : 2;
3671 uint64_t u64;
3674 uint64_t cmd : 6; /**< XMC command or request causing error */
3675 uint64_t reserved_54_57 : 4;
3676 uint64_t sid : 6; /**< XMC sid of request causing error */
3677 uint64_t reserved_38_47 : 10;
3678 uint64_t addr : 38; /**< XMC address causing the error (see Notes 2 and 3) */
3680 uint64_t addr : 38;
3681 uint64_t reserved_38_47 : 10;
3682 uint64_t sid : 6;
3683 uint64_t reserved_54_57 : 4;
3684 uint64_t cmd : 6;
3689 uint64_t cmd : 6; /**< XMC command or request causing error */
3690 uint64_t reserved_52_57 : 6;
3691 uint64_t sid : 4; /**< XMC sid of request causing error */
3692 uint64_t reserved_38_47 : 10;
3693 uint64_t addr : 38; /**< XMC address causing the error (see Notes 2 and 3) */
3695 uint64_t addr : 38;
3696 uint64_t reserved_38_47 : 10;
3697 uint64_t sid : 4;
3698 uint64_t reserved_52_57 : 6;
3699 uint64_t cmd : 6;
3706 uint64_t cmd : 6; /**< XMC command or request causing error */
3707 uint64_t reserved_53_57 : 5;
3708 uint64_t sid : 5; /**< XMC sid of request causing error */
3709 uint64_t reserved_38_47 : 10;
3710 uint64_t addr : 38; /**< XMC address causing the error (see Notes 2 and 3) */
3712 uint64_t addr : 38;
3713 uint64_t reserved_38_47 : 10;
3714 uint64_t sid : 5;
3715 uint64_t reserved_53_57 : 5;
3716 uint64_t cmd : 6;
3737 uint64_t u64;
3740 uint64_t plc1rmsk : 32; /**< PLC1 Group#1 Weighted Round Mask
3746 uint64_t plc0rmsk : 32; /**< PLC Group#0 Weighted Round Mask
3753 uint64_t plc0rmsk : 32;
3754 uint64_t plc1rmsk : 32;
3776 uint64_t u64;
3779 uint64_t ilcrmsk : 32; /**< ILC (IOB) Weighted Round Mask
3785 uint64_t plc2rmsk : 32; /**< PLC Group#2 Weighted Round Mask
3792 uint64_t plc2rmsk : 32;
3793 uint64_t ilcrmsk : 32;
3811 uint64_t u64;
3814 uint64_t reserved_9_63 : 55;
3815 uint64_t lck2ena : 1; /**< L2 Tag Lock Error2 Interrupt Enable bit
3817 uint64_t lckena : 1; /**< L2 Tag Lock Error Interrupt Enable bit
3819 uint64_t l2ddeden : 1; /**< L2 Data ECC Double Error Detect(DED) Interrupt Enable bit
3823 uint64_t l2dsecen : 1; /**< L2 Data ECC Single Error Correct(SEC) Interrupt Enable bit
3827 uint64_t l2tdeden : 1; /**< L2 Tag ECC Double Error Detect(DED) Interrupt
3829 uint64_t l2tsecen : 1; /**< L2 Tag ECC Single Error Correct(SEC) Interrupt
3834 uint64_t oob3en : 1; /**< DMA Out of Bounds Interrupt Enable Range#3 */
3835 uint64_t oob2en : 1; /**< DMA Out of Bounds Interrupt Enable Range#2 */
3836 uint64_t oob1en : 1; /**< DMA Out of Bounds Interrupt Enable Range#1 */
3838 uint64_t oob1en : 1;
3839 uint64_t oob2en : 1;
3840 uint64_t oob3en : 1;
3841 uint64_t l2tsecen : 1;
3842 uint64_t l2tdeden : 1;
3843 uint64_t l2dsecen : 1;
3844 uint64_t l2ddeden : 1;
3845 uint64_t lckena : 1;
3846 uint64_t lck2ena : 1;
3847 uint64_t reserved_9_63 : 55;
3864 uint64_t u64;
3867 uint64_t reserved_8_63 : 56;
3868 uint64_t bigrd : 1; /**< Read reference past MAXDRAM enable */
3869 uint64_t bigwr : 1; /**< Write reference past MAXDRAM enable */
3870 uint64_t vrtpe : 1; /**< Virtualization memory parity error */
3871 uint64_t vrtadrng : 1; /**< Address outside of virtualization range enable */
3872 uint64_t vrtidrng : 1; /**< Virtualization ID out of range enable */
3873 uint64_t vrtwr : 1; /**< Virtualization ID prevented a write enable */
3874 uint64_t holewr : 1; /**< Write reference to 256MB hole enable */
3875 uint64_t holerd : 1; /**< Read reference to 256MB hole enable */
3877 uint64_t holerd : 1;
3878 uint64_t holewr : 1;
3879 uint64_t vrtwr : 1;
3880 uint64_t vrtidrng : 1;
3881 uint64_t vrtadrng : 1;
3882 uint64_t vrtpe : 1;
3883 uint64_t bigwr : 1;
3884 uint64_t bigrd : 1;
3885 uint64_t reserved_8_63 : 56;
3892 uint64_t reserved_6_63 : 58;
3893 uint64_t vrtpe : 1; /**< Virtualization memory parity error */
3894 uint64_t vrtadrng : 1; /**< Address outside of virtualization range enable */
3895 uint64_t vrtidrng : 1; /**< Virtualization ID out of range enable */
3896 uint64_t vrtwr : 1; /**< Virtualization ID prevented a write enable */
3897 uint64_t holewr : 1; /**< Write reference to 256MB hole enable */
3898 uint64_t holerd : 1; /**< Read reference to 256MB hole enable */
3900 uint64_t holerd : 1;
3901 uint64_t holewr : 1;
3902 uint64_t vrtwr : 1;
3903 uint64_t vrtidrng : 1;
3904 uint64_t vrtadrng : 1;
3905 uint64_t vrtpe : 1;
3906 uint64_t reserved_6_63 : 58;
3923 uint64_t u64;
3926 uint64_t reserved_20_63 : 44;
3927 uint64_t tad3 : 1; /**< When set, the enabled interrupt is in
3929 uint64_t tad2 : 1; /**< When set, the enabled interrupt is in
3931 uint64_t tad1 : 1; /**< When set, the enabled interrupt is in
3933 uint64_t tad0 : 1; /**< When set, the enabled interrupt is in
3935 uint64_t reserved_8_15 : 8;
3936 uint64_t bigrd : 1; /**< Read reference past L2C_BIG_CTL[MAXDRAM] occurred */
3937 uint64_t bigwr : 1; /**< Write reference past L2C_BIG_CTL[MAXDRAM] occurred */
3938 uint64_t vrtpe : 1; /**< L2C_VRT_MEM read found a parity error
3942 uint64_t vrtadrng : 1; /**< Address outside of virtualization range
3946 uint64_t vrtidrng : 1; /**< Virtualization ID out of range
3949 uint64_t vrtwr : 1; /**< Virtualization ID prevented a write
3951 uint64_t holewr : 1; /**< Write reference to 256MB hole occurred */
3952 uint64_t holerd : 1; /**< Read reference to 256MB hole occurred */
3954 uint64_t holerd : 1;
3955 uint64_t holewr : 1;
3956 uint64_t vrtwr : 1;
3957 uint64_t vrtidrng : 1;
3958 uint64_t vrtadrng : 1;
3959 uint64_t vrtpe : 1;
3960 uint64_t bigwr : 1;
3961 uint64_t bigrd : 1;
3962 uint64_t reserved_8_15 : 8;
3963 uint64_t tad0 : 1;
3964 uint64_t tad1 : 1;
3965 uint64_t tad2 : 1;
3966 uint64_t tad3 : 1;
3967 uint64_t reserved_20_63 : 44;
3972 uint64_t reserved_17_63 : 47;
3973 uint64_t tad0 : 1; /**< When set, the enabled interrupt is in
3975 uint64_t reserved_8_15 : 8;
3976 uint64_t bigrd : 1; /**< Read reference past L2C_BIG_CTL[MAXDRAM] occurred */
3977 uint64_t bigwr : 1; /**< Write reference past L2C_BIG_CTL[MAXDRAM] occurred */
3978 uint64_t vrtpe : 1; /**< L2C_VRT_MEM read found a parity error
3982 uint64_t vrtadrng : 1; /**< Address outside of virtualization range
3986 uint64_t vrtidrng : 1; /**< Virtualization ID out of range
3989 uint64_t vrtwr : 1; /**< Virtualization ID prevented a write
3991 uint64_t holewr : 1; /**< Write reference to 256MB hole occurred */
3992 uint64_t holerd : 1; /**< Read reference to 256MB hole occurred */
3994 uint64_t holerd : 1;
3995 uint64_t holewr : 1;
3996 uint64_t vrtwr : 1;
3997 uint64_t vrtidrng : 1;
3998 uint64_t vrtadrng : 1;
3999 uint64_t vrtpe : 1;
4000 uint64_t bigwr : 1;
4001 uint64_t bigrd : 1;
4002 uint64_t reserved_8_15 : 8;
4003 uint64_t tad0 : 1;
4004 uint64_t reserved_17_63 : 47;
4010 uint64_t reserved_17_63 : 47;
4011 uint64_t tad0 : 1; /**< When set, the enabled interrupt is in either
4013 uint64_t reserved_6_15 : 10;
4014 uint64_t vrtpe : 1; /**< L2C_VRT_MEM read found a parity error
4018 uint64_t vrtadrng : 1; /**< Address outside of virtualization range
4022 uint64_t vrtidrng : 1; /**< Virtualization ID out of range
4025 uint64_t vrtwr : 1; /**< Virtualization ID prevented a write
4027 uint64_t holewr : 1; /**< Write reference to 256MB hole occurred */
4028 uint64_t holerd : 1; /**< Read reference to 256MB hole occurred */
4030 uint64_t holerd : 1;
4031 uint64_t holewr : 1;
4032 uint64_t vrtwr : 1;
4033 uint64_t vrtidrng : 1;
4034 uint64_t vrtadrng : 1;
4035 uint64_t vrtpe : 1;
4036 uint64_t reserved_6_15 : 10;
4037 uint64_t tad0 : 1;
4038 uint64_t reserved_17_63 : 47;
4056 uint64_t u64;
4059 uint64_t reserved_9_63 : 55;
4060 uint64_t lck2 : 1; /**< HW detected a case where a Rd/Wr Miss from PP#n
4073 uint64_t lck : 1; /**< SW attempted to LOCK DOWN the last available set of
4085 uint64_t l2dded : 1; /**< L2D Double Error detected (DED)
4087 uint64_t l2dsec : 1; /**< L2D Single Error corrected (SEC)
4089 uint64_t l2tded : 1; /**< L2T Double Bit Error detected (DED)
4095 uint64_t l2tsec : 1; /**< L2T Single Bit Error corrected (SEC) status
4102 uint64_t oob3 : 1; /**< DMA Out of Bounds Interrupt Status Range#3 */
4103 uint64_t oob2 : 1; /**< DMA Out of Bounds Interrupt Status Range#2 */
4104 uint64_t oob1 : 1; /**< DMA Out of Bounds Interrupt Status Range#1 */
4106 uint64_t oob1 : 1;
4107 uint64_t oob2 : 1;
4108 uint64_t oob3 : 1;
4109 uint64_t l2tsec : 1;
4110 uint64_t l2tded : 1;
4111 uint64_t l2dsec : 1;
4112 uint64_t l2dded : 1;
4113 uint64_t lck : 1;
4114 uint64_t lck2 : 1;
4115 uint64_t reserved_9_63 : 55;
4132 uint64_t u64;
4135 uint64_t count : 64; /**< Current counter value */
4137 uint64_t count : 64;
4157 uint64_t u64;
4160 uint64_t count : 64; /**< Current counter value */
4162 uint64_t count : 64;
4193 uint64_t u64;
4196 uint64_t reserved_31_63 : 33;
4197 uint64_t lck_base : 27; /**< Base Memory block address[33:7]. Specifies the
4199 uint64_t reserved_1_3 : 3;
4200 uint64_t lck_ena : 1; /**< L2 Cache Lock Enable
4236 uint64_t lck_ena : 1;
4237 uint64_t reserved_1_3 : 3;
4238 uint64_t lck_base : 27;
4239 uint64_t reserved_31_63 : 33;
4268 uint64_t u64;
4271 uint64_t reserved_10_63 : 54;
4272 uint64_t lck_offset : 10; /**< LockDown block Offset. Used in determining
4278 uint64_t lck_offset : 10;
4279 uint64_t reserved_10_63 : 54;
4304 uint64_t u64;
4307 uint64_t reserved_32_63 : 32;
4308 uint64_t stcpnd : 1; /**< LFB STC Pending Status */
4309 uint64_t stpnd : 1; /**< LFB ST* Pending Status */
4310 uint64_t stinv : 1; /**< LFB ST* Invalidate Status */
4311 uint64_t stcfl : 1; /**< LFB STC=FAIL Status */
4312 uint64_t vam : 1; /**< Valid Full Address Match Status */
4313 uint64_t inxt : 4; /**< Next LFB Pointer(invalid if ITL=1) */
4314 uint64_t itl : 1; /**< LFB Tail of List Indicator */
4315 uint64_t ihd : 1; /**< LFB Head of List Indicator */
4316 uint64_t set : 3; /**< SET# used for DS-OP (hit=hset/miss=rset) */
4317 uint64_t vabnum : 4; /**< VAB# used for LMC Miss Launch(valid only if VAM=1) */
4318 uint64_t sid : 9; /**< LFB Source ID */
4319 uint64_t cmd : 4; /**< LFB Command */
4320 uint64_t vld : 1; /**< LFB Valid */
4322 uint64_t vld : 1;
4323 uint64_t cmd : 4;
4324 uint64_t sid : 9;
4325 uint64_t vabnum : 4;
4326 uint64_t set : 3;
4327 uint64_t ihd : 1;
4328 uint64_t itl : 1;
4329 uint64_t inxt : 4;
4330 uint64_t vam : 1;
4331 uint64_t stcfl : 1;
4332 uint64_t stinv : 1;
4333 uint64_t stpnd : 1;
4334 uint64_t stcpnd : 1;
4335 uint64_t reserved_32_63 : 32;
4340 uint64_t reserved_32_63 : 32;
4341 uint64_t stcpnd : 1; /**< LFB STC Pending Status */
4342 uint64_t stpnd : 1; /**< LFB ST* Pending Status */
4343 uint64_t stinv : 1; /**< LFB ST* Invalidate Status */
4344 uint64_t stcfl : 1; /**< LFB STC=FAIL Status */
4345 uint64_t vam : 1; /**< Valid Full Address Match Status */
4346 uint64_t reserved_25_26 : 2;
4347 uint64_t inxt : 2; /**< Next LFB Pointer(invalid if ITL=1) */
4348 uint64_t itl : 1; /**< LFB Tail of List Indicator */
4349 uint64_t ihd : 1; /**< LFB Head of List Indicator */
4350 uint64_t reserved_20_20 : 1;
4351 uint64_t set : 2; /**< SET# used for DS-OP (hit=hset/miss=rset) */
4352 uint64_t reserved_16_17 : 2;
4353 uint64_t vabnum : 2; /**< VAB# used for LMC Miss Launch(valid only if VAM=1) */
4354 uint64_t sid : 9; /**< LFB Source ID */
4355 uint64_t cmd : 4; /**< LFB Command */
4356 uint64_t vld : 1; /**< LFB Valid */
4358 uint64_t vld : 1;
4359 uint64_t cmd : 4;
4360 uint64_t sid : 9;
4361 uint64_t vabnum : 2;
4362 uint64_t reserved_16_17 : 2;
4363 uint64_t set : 2;
4364 uint64_t reserved_20_20 : 1;
4365 uint64_t ihd : 1;
4366 uint64_t itl : 1;
4367 uint64_t inxt : 2;
4368 uint64_t reserved_25_26 : 2;
4369 uint64_t vam : 1;
4370 uint64_t stcfl : 1;
4371 uint64_t stinv : 1;
4372 uint64_t stpnd : 1;
4373 uint64_t stcpnd : 1;
4374 uint64_t reserved_32_63 : 32;
4379 uint64_t reserved_32_63 : 32;
4380 uint64_t stcpnd : 1; /**< LFB STC Pending Status */
4381 uint64_t stpnd : 1; /**< LFB ST* Pending Status */
4382 uint64_t stinv : 1; /**< LFB ST* Invalidate Status */
4383 uint64_t stcfl : 1; /**< LFB STC=FAIL Status */
4384 uint64_t vam : 1; /**< Valid Full Address Match Status */
4385 uint64_t reserved_26_26 : 1;
4386 uint64_t inxt : 3; /**< Next LFB Pointer(invalid if ITL=1) */
4387 uint64_t itl : 1; /**< LFB Tail of List Indicator */
4388 uint64_t ihd : 1; /**< LFB Head of List Indicator */
4389 uint64_t reserved_20_20 : 1;
4390 uint64_t set : 2; /**< SET# used for DS-OP (hit=hset/miss=rset) */
4391 uint64_t reserved_17_17 : 1;
4392 uint64_t vabnum : 3; /**< VAB# used for LMC Miss Launch(valid only if VAM=1) */
4393 uint64_t sid : 9; /**< LFB Source ID */
4394 uint64_t cmd : 4; /**< LFB Command */
4395 uint64_t vld : 1; /**< LFB Valid */
4397 uint64_t vld : 1;
4398 uint64_t cmd : 4;
4399 uint64_t sid : 9;
4400 uint64_t vabnum : 3;
4401 uint64_t reserved_17_17 : 1;
4402 uint64_t set : 2;
4403 uint64_t reserved_20_20 : 1;
4404 uint64_t ihd : 1;
4405 uint64_t itl : 1;
4406 uint64_t inxt : 3;
4407 uint64_t reserved_26_26 : 1;
4408 uint64_t vam : 1;
4409 uint64_t stcfl : 1;
4410 uint64_t stinv : 1;
4411 uint64_t stpnd : 1;
4412 uint64_t stcpnd : 1;
4413 uint64_t reserved_32_63 : 32;
4420 uint64_t reserved_32_63 : 32;
4421 uint64_t stcpnd : 1; /**< LFB STC Pending Status */
4422 uint64_t stpnd : 1; /**< LFB ST* Pending Status */
4423 uint64_t stinv : 1; /**< LFB ST* Invalidate Status */
4424 uint64_t stcfl : 1; /**< LFB STC=FAIL Status */
4425 uint64_t vam : 1; /**< Valid Full Address Match Status */
4426 uint64_t reserved_26_26 : 1;
4427 uint64_t inxt : 3; /**< Next LFB Pointer(invalid if ITL=1) */
4428 uint64_t itl : 1; /**< LFB Tail of List Indicator */
4429 uint64_t ihd : 1; /**< LFB Head of List Indicator */
4430 uint64_t set : 3; /**< SET# used for DS-OP (hit=hset/miss=rset) */
4431 uint64_t reserved_17_17 : 1;
4432 uint64_t vabnum : 3; /**< VAB# used for LMC Miss Launch(valid only if VAM=1) */
4433 uint64_t sid : 9; /**< LFB Source ID */
4434 uint64_t cmd : 4; /**< LFB Command */
4435 uint64_t vld : 1; /**< LFB Valid */
4437 uint64_t vld : 1;
4438 uint64_t cmd : 4;
4439 uint64_t sid : 9;
4440 uint64_t vabnum : 3;
4441 uint64_t reserved_17_17 : 1;
4442 uint64_t set : 3;
4443 uint64_t ihd : 1;
4444 uint64_t itl : 1;
4445 uint64_t inxt : 3;
4446 uint64_t reserved_26_26 : 1;
4447 uint64_t vam : 1;
4448 uint64_t stcfl : 1;
4449 uint64_t stinv : 1;
4450 uint64_t stpnd : 1;
4451 uint64_t stcpnd : 1;
4452 uint64_t reserved_32_63 : 32;
4472 uint64_t u64;
4475 uint64_t reserved_19_63 : 45;
4476 uint64_t dsgoing : 1; /**< LFB DS Going (in flight) */
4477 uint64_t bid : 2; /**< LFB DS Bid# */
4478 uint64_t wtrsp : 1; /**< LFB Waiting for RSC Response [FILL,STRSP] completion */
4479 uint64_t wtdw : 1; /**< LFB Waiting for DS-WR completion */
4480 uint64_t wtdq : 1; /**< LFB Waiting for LFB-DQ */
4481 uint64_t wtwhp : 1; /**< LFB Waiting for Write-Hit Partial L2 DS-WR completion */
4482 uint64_t wtwhf : 1; /**< LFB Waiting for Write-Hit Full L2 DS-WR completion */
4483 uint64_t wtwrm : 1; /**< LFB Waiting for Write-Miss L2 DS-WR completion */
4484 uint64_t wtstm : 1; /**< LFB Waiting for Write-Miss L2 DS-WR completion */
4485 uint64_t wtrda : 1; /**< LFB Waiting for Read-Miss L2 DS-WR completion */
4486 uint64_t wtstdt : 1; /**< LFB Waiting for all ST write Data to arrive on XMD bus */
4487 uint64_t wtstrsp : 1; /**< LFB Waiting for ST RSC/RSD to be issued on RSP
4489 uint64_t wtstrsc : 1; /**< LFB Waiting for ST RSC-Only to be issued on RSP
4491 uint64_t wtvtm : 1; /**< LFB Waiting for Victim Read L2 DS-RD completion */
4492 uint64_t wtmfl : 1; /**< LFB Waiting for Memory Fill completion to MRB */
4493 uint64_t prbrty : 1; /**< Probe-Retry Detected - waiting for probe completion */
4494 uint64_t wtprb : 1; /**< LFB Waiting for Probe */
4495 uint64_t vld : 1; /**< LFB Valid */
4497 uint64_t vld : 1;
4498 uint64_t wtprb : 1;
4499 uint64_t prbrty : 1;
4500 uint64_t wtmfl : 1;
4501 uint64_t wtvtm : 1;
4502 uint64_t wtstrsc : 1;
4503 uint64_t wtstrsp : 1;
4504 uint64_t wtstdt : 1;
4505 uint64_t wtrda : 1;
4506 uint64_t wtstm : 1;
4507 uint64_t wtwrm : 1;
4508 uint64_t wtwhf : 1;
4509 uint64_t wtwhp : 1;
4510 uint64_t wtdq : 1;
4511 uint64_t wtdw : 1;
4512 uint64_t wtrsp : 1;
4513 uint64_t bid : 2;
4514 uint64_t dsgoing : 1;
4515 uint64_t reserved_19_63 : 45;
4540 uint64_t u64;
4543 uint64_t reserved_0_63 : 64;
4545 uint64_t reserved_0_63 : 64;
4550 uint64_t reserved_27_63 : 37;
4551 uint64_t lfb_tag : 19; /**< LFB TAG[33:15] */
4552 uint64_t lfb_idx : 8; /**< LFB IDX[14:7] */
4554 uint64_t lfb_idx : 8;
4555 uint64_t lfb_tag : 19;
4556 uint64_t reserved_27_63 : 37;
4561 uint64_t reserved_27_63 : 37;
4562 uint64_t lfb_tag : 17; /**< LFB TAG[33:16] */
4563 uint64_t lfb_idx : 10; /**< LFB IDX[15:7] */
4565 uint64_t lfb_idx : 10;
4566 uint64_t lfb_tag : 17;
4567 uint64_t reserved_27_63 : 37;
4574 uint64_t reserved_27_63 : 37;
4575 uint64_t lfb_tag : 20; /**< LFB TAG[33:14] */
4576 uint64_t lfb_idx : 7; /**< LFB IDX[13:7] */
4578 uint64_t lfb_idx : 7;
4579 uint64_t lfb_tag : 20;
4580 uint64_t reserved_27_63 : 37;
4585 uint64_t reserved_27_63 : 37;
4586 uint64_t lfb_tag : 18; /**< LFB TAG[33:16] */
4587 uint64_t lfb_idx : 9; /**< LFB IDX[15:7] */
4589 uint64_t lfb_idx : 9;
4590 uint64_t lfb_tag : 18;
4591 uint64_t reserved_27_63 : 37;
4597 uint64_t reserved_27_63 : 37;
4598 uint64_t lfb_tag : 16; /**< LFB TAG[33:18] */
4599 uint64_t lfb_idx : 11; /**< LFB IDX[17:7] */
4601 uint64_t lfb_idx : 11;
4602 uint64_t lfb_tag : 16;
4603 uint64_t reserved_27_63 : 37;
4620 uint64_t u64;
4623 uint64_t reserved_5_63 : 59;
4624 uint64_t stpartdis : 1; /**< STP/C Performance Enhancement Disable
4630 uint64_t lfb_hwm : 4; /**< LFB High Water Mark
4637 uint64_t lfb_hwm : 4;
4638 uint64_t stpartdis : 1;
4639 uint64_t reserved_5_63 : 59;
4644 uint64_t reserved_5_63 : 59;
4645 uint64_t stpartdis : 1; /**< STP/C Performance Enhancement Disable
4651 uint64_t reserved_2_3 : 2;
4652 uint64_t lfb_hwm : 2; /**< LFB High Water Mark
4659 uint64_t lfb_hwm : 2;
4660 uint64_t reserved_2_3 : 2;
4661 uint64_t stpartdis : 1;
4662 uint64_t reserved_5_63 : 59;
4667 uint64_t reserved_5_63 : 59;
4668 uint64_t stpartdis : 1; /**< STP/C Performance Enhancement Disable
4674 uint64_t reserved_3_3 : 1;
4675 uint64_t lfb_hwm : 3; /**< LFB High Water Mark
4682 uint64_t lfb_hwm : 3;
4683 uint64_t reserved_3_3 : 1;
4684 uint64_t stpartdis : 1;
4685 uint64_t reserved_5_63 : 59;
4708 uint64_t u64;
4711 uint64_t reserved_2_63 : 62;
4712 uint64_t dwbena : 1; /**< DMA Out of Bounds Range Checker for DMA DWB
4719 uint64_t stena : 1; /**< DMA Out of Bounds Range Checker for DMA store
4727 uint64_t stena : 1;
4728 uint64_t dwbena : 1;
4729 uint64_t reserved_2_63 : 62;
4748 uint64_t u64;
4751 uint64_t fadr : 27; /**< DMA initated Memory Range Checker Failing Address
4757 uint64_t fsrc : 1; /**< DMA Out of Bounds Failing Source Command
4764 uint64_t reserved_34_35 : 2;
4765 uint64_t sadr : 14; /**< DMA initated Memory Range Checker Starting Address
4767 uint64_t reserved_14_19 : 6;
4768 uint64_t size : 14; /**< DMA Out of Bounds Range Checker Size
4776 uint64_t size : 14;
4777 uint64_t reserved_14_19 : 6;
4778 uint64_t sadr : 14;
4779 uint64_t reserved_34_35 : 2;
4780 uint64_t fsrc : 1;
4781 uint64_t fadr : 27;
4800 uint64_t u64;
4803 uint64_t fadr : 27; /**< DMA initated Memory Range Checker Failing Address
4809 uint64_t fsrc : 1; /**< DMA Out of Bounds Failing Source Command
4816 uint64_t reserved_34_35 : 2;
4817 uint64_t sadr : 14; /**< DMA initated Memory Range Checker Starting Address
4819 uint64_t reserved_14_19 : 6;
4820 uint64_t size : 14; /**< DMA Out of Bounds Range Checker Size
4828 uint64_t size : 14;
4829 uint64_t reserved_14_19 : 6;
4830 uint64_t sadr : 14;
4831 uint64_t reserved_34_35 : 2;
4832 uint64_t fsrc : 1;
4833 uint64_t fadr : 27;
4852 uint64_t u64;
4855 uint64_t fadr : 27; /**< DMA initated Memory Range Checker Failing Address
4861 uint64_t fsrc : 1; /**< DMA Out of Bounds Failing Source Command
4868 uint64_t reserved_34_35 : 2;
4869 uint64_t sadr : 14; /**< DMA initated Memory Range Checker Starting Address
4871 uint64_t reserved_14_19 : 6;
4872 uint64_t size : 14; /**< DMA Out of Bounds Range Checker Size
4880 uint64_t size : 14;
4881 uint64_t reserved_14_19 : 6;
4882 uint64_t sadr : 14;
4883 uint64_t reserved_34_35 : 2;
4884 uint64_t fsrc : 1;
4885 uint64_t fadr : 27;
4903 uint64_t u64;
4906 uint64_t reserved_36_63 : 28;
4907 uint64_t pfcnt0 : 36; /**< Performance Counter \#0 */
4909 uint64_t pfcnt0 : 36;
4910 uint64_t reserved_36_63 : 28;
4995 uint64_t u64;
4998 uint64_t reserved_36_63 : 28;
4999 uint64_t cnt3rdclr : 1; /**< Performance Counter 3 Read Clear
5006 uint64_t cnt2rdclr : 1; /**< Performance Counter 2 Read Clear
5013 uint64_t cnt1rdclr : 1; /**< Performance Counter 1 Read Clear
5020 uint64_t cnt0rdclr : 1; /**< Performance Counter 0 Read Clear
5027 uint64_t cnt3ena : 1; /**< Performance Counter 3 Enable
5030 uint64_t cnt3clr : 1; /**< Performance Counter 3 Clear
5034 uint64_t cnt3sel : 6; /**< Performance Counter 3 Event Selector
5036 uint64_t cnt2ena : 1; /**< Performance Counter 2 Enable
5039 uint64_t cnt2clr : 1; /**< Performance Counter 2 Clear
5043 uint64_t cnt2sel : 6; /**< Performance Counter 2 Event Selector
5045 uint64_t cnt1ena : 1; /**< Performance Counter 1 Enable
5048 uint64_t cnt1clr : 1; /**< Performance Counter 1 Clear
5052 uint64_t cnt1sel : 6; /**< Performance Counter 1 Event Selector
5054 uint64_t cnt0ena : 1; /**< Performance Counter 0 Enable
5057 uint64_t cnt0clr : 1; /**< Performance Counter 0 Clear
5061 uint64_t cnt0sel : 6; /**< Performance Counter 0 Event Selector
5064 uint64_t cnt0sel : 6;
5065 uint64_t cnt0clr : 1;
5066 uint64_t cnt0ena : 1;
5067 uint64_t cnt1sel : 6;
5068 uint64_t cnt1clr : 1;
5069 uint64_t cnt1ena : 1;
5070 uint64_t cnt2sel : 6;
5071 uint64_t cnt2clr : 1;
5072 uint64_t cnt2ena : 1;
5073 uint64_t cnt3sel : 6;
5074 uint64_t cnt3clr : 1;
5075 uint64_t cnt3ena : 1;
5076 uint64_t cnt0rdclr : 1;
5077 uint64_t cnt1rdclr : 1;
5078 uint64_t cnt2rdclr : 1;
5079 uint64_t cnt3rdclr : 1;
5080 uint64_t reserved_36_63 : 28;
5105 uint64_t u64;
5108 uint64_t reserved_24_63 : 40;
5109 uint64_t pp11grp : 2; /**< PP11 PLC Group# (0,1,2) */
5110 uint64_t pp10grp : 2; /**< PP10 PLC Group# (0,1,2) */
5111 uint64_t pp9grp : 2; /**< PP9 PLC Group# (0,1,2) */
5112 uint64_t pp8grp : 2; /**< PP8 PLC Group# (0,1,2) */
5113 uint64_t pp7grp : 2; /**< PP7 PLC Group# (0,1,2) */
5114 uint64_t pp6grp : 2; /**< PP6 PLC Group# (0,1,2) */
5115 uint64_t pp5grp : 2; /**< PP5 PLC Group# (0,1,2) */
5116 uint64_t pp4grp : 2; /**< PP4 PLC Group# (0,1,2) */
5117 uint64_t pp3grp : 2; /**< PP3 PLC Group# (0,1,2) */
5118 uint64_t pp2grp : 2; /**< PP2 PLC Group# (0,1,2) */
5119 uint64_t pp1grp : 2; /**< PP1 PLC Group# (0,1,2) */
5120 uint64_t pp0grp : 2; /**< PP0 PLC Group# (0,1,2) */
5122 uint64_t pp0grp : 2;
5123 uint64_t pp1grp : 2;
5124 uint64_t pp2grp : 2;
5125 uint64_t pp3grp : 2;
5126 uint64_t pp4grp : 2;
5127 uint64_t pp5grp : 2;
5128 uint64_t pp6grp : 2;
5129 uint64_t pp7grp : 2;
5130 uint64_t pp8grp : 2;
5131 uint64_t pp9grp : 2;
5132 uint64_t pp10grp : 2;
5133 uint64_t pp11grp : 2;
5134 uint64_t reserved_24_63 : 40;
5139 uint64_t reserved_8_63 : 56;
5140 uint64_t pp3grp : 2; /**< PP3 PLC Group# (0,1,2) */
5141 uint64_t pp2grp : 2; /**< PP2 PLC Group# (0,1,2) */
5142 uint64_t pp1grp : 2; /**< PP1 PLC Group# (0,1,2) */
5143 uint64_t pp0grp : 2; /**< PP0 PLC Group# (0,1,2) */
5145 uint64_t pp0grp : 2;
5146 uint64_t pp1grp : 2;
5147 uint64_t pp2grp : 2;
5148 uint64_t pp3grp : 2;
5149 uint64_t reserved_8_63 : 56;
5166 uint64_t u64;
5169 uint64_t reserved_7_63 : 57;
5170 uint64_t dwblvl : 3; /**< QOS level for DWB commands. */
5171 uint64_t reserved_3_3 : 1;
5172 uint64_t lvl : 3; /**< QOS level for non-DWB commands. */
5174 uint64_t lvl : 3;
5175 uint64_t reserved_3_3 : 1;
5176 uint64_t dwblvl : 3;
5177 uint64_t reserved_7_63 : 57;
5182 uint64_t reserved_6_63 : 58;
5183 uint64_t dwblvl : 2; /**< QOS level for DWB commands. */
5184 uint64_t reserved_2_3 : 2;
5185 uint64_t lvl : 2; /**< QOS level for non-DWB commands. */
5187 uint64_t lvl : 2;
5188 uint64_t reserved_2_3 : 2;
5189 uint64_t dwblvl : 2;
5190 uint64_t reserved_6_63 : 58;
5210 uint64_t u64;
5213 uint64_t reserved_3_63 : 61;
5214 uint64_t lvl : 3; /**< QOS level to use for this PP. */
5216 uint64_t lvl : 3;
5217 uint64_t reserved_3_63 : 61;
5222 uint64_t reserved_2_63 : 62;
5223 uint64_t lvl : 2; /**< QOS level to use for this PP. */
5225 uint64_t lvl : 2;
5226 uint64_t reserved_2_63 : 62;
5245 uint64_t u64;
5248 uint64_t wgt7 : 8; /**< Weight for QOS level 7 */
5249 uint64_t wgt6 : 8; /**< Weight for QOS level 6 */
5250 uint64_t wgt5 : 8; /**< Weight for QOS level 5 */
5251 uint64_t wgt4 : 8; /**< Weight for QOS level 4 */
5252 uint64_t wgt3 : 8; /**< Weight for QOS level 3 */
5253 uint64_t wgt2 : 8; /**< Weight for QOS level 2 */
5254 uint64_t wgt1 : 8; /**< Weight for QOS level 1 */
5255 uint64_t wgt0 : 8; /**< Weight for QOS level 0 */
5257 uint64_t wgt0 : 8;
5258 uint64_t wgt1 : 8;
5259 uint64_t wgt2 : 8;
5260 uint64_t wgt3 : 8;
5261 uint64_t wgt4 : 8;
5262 uint64_t wgt5 : 8;
5263 uint64_t wgt6 : 8;
5264 uint64_t wgt7 : 8;
5269 uint64_t reserved_32_63 : 32;
5270 uint64_t wgt3 : 8; /**< Weight for QOS level 3 */
5271 uint64_t wgt2 : 8; /**< Weight for QOS level 2 */
5272 uint64_t wgt1 : 8; /**< Weight for QOS level 1 */
5273 uint64_t wgt0 : 8; /**< Weight for QOS level 0 */
5275 uint64_t wgt0 : 8;
5276 uint64_t wgt1 : 8;
5277 uint64_t wgt2 : 8;
5278 uint64_t wgt3 : 8;
5279 uint64_t reserved_32_63 : 32;
5298 uint64_t u64;
5301 uint64_t count : 64; /**< Current counter value */
5303 uint64_t count : 64;
5323 uint64_t u64;
5326 uint64_t count : 64; /**< Current counter value */
5328 uint64_t count : 64;
5356 uint64_t u64;
5359 uint64_t reserved_32_63 : 32;
5360 uint64_t umsk3 : 8; /**< PP[3] L2 'DO NOT USE' set partition mask */
5361 uint64_t umsk2 : 8; /**< PP[2] L2 'DO NOT USE' set partition mask */
5362 uint64_t umsk1 : 8; /**< PP[1] L2 'DO NOT USE' set partition mask */
5363 uint64_t umsk0 : 8; /**< PP[0] L2 'DO NOT USE' set partition mask */
5365 uint64_t umsk0 : 8;
5366 uint64_t umsk1 : 8;
5367 uint64_t umsk2 : 8;
5368 uint64_t umsk3 : 8;
5369 uint64_t reserved_32_63 : 32;
5374 uint64_t reserved_4_63 : 60;
5375 uint64_t umsk0 : 4; /**< PP[0] L2 'DO NOT USE' set partition mask */
5377 uint64_t umsk0 : 4;
5378 uint64_t reserved_4_63 : 60;
5383 uint64_t reserved_12_63 : 52;
5384 uint64_t umsk1 : 4; /**< PP[1] L2 'DO NOT USE' set partition mask */
5385 uint64_t reserved_4_7 : 4;
5386 uint64_t umsk0 : 4; /**< PP[0] L2 'DO NOT USE' set partition mask */
5388 uint64_t umsk0 : 4;
5389 uint64_t reserved_4_7 : 4;
5390 uint64_t umsk1 : 4;
5391 uint64_t reserved_12_63 : 52;
5398 uint64_t reserved_16_63 : 48;
5399 uint64_t umsk1 : 8; /**< PP[1] L2 'DO NOT USE' set partition mask */
5400 uint64_t umsk0 : 8; /**< PP[0] L2 'DO NOT USE' set partition mask */
5402 uint64_t umsk0 : 8;
5403 uint64_t umsk1 : 8;
5404 uint64_t reserved_16_63 : 48;
5431 uint64_t u64;
5434 uint64_t reserved_32_63 : 32;
5435 uint64_t umsk7 : 8; /**< PP[7] L2 'DO NOT USE' set partition mask */
5436 uint64_t umsk6 : 8; /**< PP[6] L2 'DO NOT USE' set partition mask */
5437 uint64_t umsk5 : 8; /**< PP[5] L2 'DO NOT USE' set partition mask */
5438 uint64_t umsk4 : 8; /**< PP[4] L2 'DO NOT USE' set partition mask */
5440 uint64_t umsk4 : 8;
5441 uint64_t umsk5 : 8;
5442 uint64_t umsk6 : 8;
5443 uint64_t umsk7 : 8;
5444 uint64_t reserved_32_63 : 32;
5471 uint64_t u64;
5474 uint64_t reserved_32_63 : 32;
5475 uint64_t umsk11 : 8; /**< PP[11] L2 'DO NOT USE' set partition mask */
5476 uint64_t umsk10 : 8; /**< PP[10] L2 'DO NOT USE' set partition mask */
5477 uint64_t umsk9 : 8; /**< PP[9] L2 'DO NOT USE' set partition mask */
5478 uint64_t umsk8 : 8; /**< PP[8] L2 'DO NOT USE' set partition mask */
5480 uint64_t umsk8 : 8;
5481 uint64_t umsk9 : 8;
5482 uint64_t umsk10 : 8;
5483 uint64_t umsk11 : 8;
5484 uint64_t reserved_32_63 : 32;
5511 uint64_t u64;
5514 uint64_t reserved_32_63 : 32;
5515 uint64_t umsk15 : 8; /**< PP[15] L2 'DO NOT USE' set partition mask */
5516 uint64_t umsk14 : 8; /**< PP[14] L2 'DO NOT USE' set partition mask */
5517 uint64_t umsk13 : 8; /**< PP[13] L2 'DO NOT USE' set partition mask */
5518 uint64_t umsk12 : 8; /**< PP[12] L2 'DO NOT USE' set partition mask */
5520 uint64_t umsk12 : 8;
5521 uint64_t umsk13 : 8;
5522 uint64_t umsk14 : 8;
5523 uint64_t umsk15 : 8;
5524 uint64_t reserved_32_63 : 32;
5549 uint64_t u64;
5552 uint64_t reserved_8_63 : 56;
5553 uint64_t umskiob : 8; /**< IOB L2 'DO NOT USE' set partition mask */
5555 uint64_t umskiob : 8;
5556 uint64_t reserved_8_63 : 56;
5561 uint64_t reserved_4_63 : 60;
5562 uint64_t umskiob : 4; /**< IOB L2 'DO NOT USE' set partition mask */
5564 uint64_t umskiob : 4;
5565 uint64_t reserved_4_63 : 60;
5589 uint64_t u64;
5592 uint64_t reserved_58_63 : 6;
5593 uint64_t ow3ecc : 10; /**< ECC for OW3 of cache block */
5594 uint64_t reserved_42_47 : 6;
5595 uint64_t ow2ecc : 10; /**< ECC for OW2 of cache block */
5596 uint64_t reserved_26_31 : 6;
5597 uint64_t ow1ecc : 10; /**< ECC for OW1 of cache block */
5598 uint64_t reserved_10_15 : 6;
5599 uint64_t ow0ecc : 10; /**< ECC for OW0 of cache block */
5601 uint64_t ow0ecc : 10;
5602 uint64_t reserved_10_15 : 6;
5603 uint64_t ow1ecc : 10;
5604 uint64_t reserved_26_31 : 6;
5605 uint64_t ow2ecc : 10;
5606 uint64_t reserved_42_47 : 6;
5607 uint64_t ow3ecc : 10;
5608 uint64_t reserved_58_63 : 6;
5629 uint64_t u64;
5632 uint64_t reserved_58_63 : 6;
5633 uint64_t ow7ecc : 10; /**< ECC for OW7 of cache block */
5634 uint64_t reserved_42_47 : 6;
5635 uint64_t ow6ecc : 10; /**< ECC for OW6 of cache block */
5636 uint64_t reserved_26_31 : 6;
5637 uint64_t ow5ecc : 10; /**< ECC for OW5 of cache block */
5638 uint64_t reserved_10_15 : 6;
5639 uint64_t ow4ecc : 10; /**< ECC for OW4 of cache block */
5641 uint64_t ow4ecc : 10;
5642 uint64_t reserved_10_15 : 6;
5643 uint64_t ow5ecc : 10;
5644 uint64_t reserved_26_31 : 6;
5645 uint64_t ow6ecc : 10;
5646 uint64_t reserved_42_47 : 6;
5647 uint64_t ow7ecc : 10;
5648 uint64_t reserved_58_63 : 6;
5668 uint64_t u64;
5671 uint64_t reserved_9_63 : 55;
5672 uint64_t wrdislmc : 1; /**< Illegal Write to Disabled LMC Error enable
5675 uint64_t rddislmc : 1; /**< Illegal Read to Disabled LMC Error enable
5678 uint64_t noway : 1; /**< No way available interrupt enable
5681 uint64_t vbfdbe : 1; /**< VBF Double-Bit Error enable
5684 uint64_t vbfsbe : 1; /**< VBF Single-Bit Error enable
5687 uint64_t tagdbe : 1; /**< TAG Double-Bit Error enable
5690 uint64_t tagsbe : 1; /**< TAG Single-Bit Error enable
5693 uint64_t l2ddbe : 1; /**< L2D Double-Bit Error enable
5696 uint64_t l2dsbe : 1; /**< L2D Single-Bit Error enable
5700 uint64_t l2dsbe : 1;
5701 uint64_t l2ddbe : 1;
5702 uint64_t tagsbe : 1;
5703 uint64_t tagdbe : 1;
5704 uint64_t vbfsbe : 1;
5705 uint64_t vbfdbe : 1;
5706 uint64_t noway : 1;
5707 uint64_t rddislmc : 1;
5708 uint64_t wrdislmc : 1;
5709 uint64_t reserved_9_63 : 55;
5716 uint64_t reserved_7_63 : 57;
5717 uint64_t noway : 1; /**< No way available interrupt enable
5720 uint64_t vbfdbe : 1; /**< VBF Double-Bit Error enable
5723 uint64_t vbfsbe : 1; /**< VBF Single-Bit Error enable
5726 uint64_t tagdbe : 1; /**< TAG Double-Bit Error enable
5729 uint64_t tagsbe : 1; /**< TAG Single-Bit Error enable
5732 uint64_t l2ddbe : 1; /**< L2D Double-Bit Error enable
5735 uint64_t l2dsbe : 1; /**< L2D Single-Bit Error enable
5739 uint64_t l2dsbe : 1;
5740 uint64_t l2ddbe : 1;
5741 uint64_t tagsbe : 1;
5742 uint64_t tagdbe : 1;
5743 uint64_t vbfsbe : 1;
5744 uint64_t vbfdbe : 1;
5745 uint64_t noway : 1;
5746 uint64_t reserved_7_63 : 57;
5767 uint64_t u64;
5770 uint64_t reserved_9_63 : 55;
5771 uint64_t wrdislmc : 1; /**< Illegal Write to Disabled LMC Error
5773 uint64_t rddislmc : 1; /**< Illegal Read to Disabled LMC Error
5775 uint64_t noway : 1; /**< No way available interrupt
5778 uint64_t vbfdbe : 1; /**< VBF Double-Bit Error
5781 uint64_t vbfsbe : 1; /**< VBF Single-Bit Error
5784 uint64_t tagdbe : 1; /**< TAG Double-Bit Error
5787 uint64_t tagsbe : 1; /**< TAG Single-Bit Error
5790 uint64_t l2ddbe : 1; /**< L2D Double-Bit Error
5793 uint64_t l2dsbe : 1; /**< L2D Single-Bit Error
5797 uint64_t l2dsbe : 1;
5798 uint64_t l2ddbe : 1;
5799 uint64_t tagsbe : 1;
5800 uint64_t tagdbe : 1;
5801 uint64_t vbfsbe : 1;
5802 uint64_t vbfdbe : 1;
5803 uint64_t noway : 1;
5804 uint64_t rddislmc : 1;
5805 uint64_t wrdislmc : 1;
5806 uint64_t reserved_9_63 : 55;
5825 uint64_t u64;
5828 uint64_t count : 64; /**< Current counter value */
5830 uint64_t count : 64;
5850 uint64_t u64;
5853 uint64_t count : 64; /**< Current counter value */
5855 uint64_t count : 64;
5875 uint64_t u64;
5878 uint64_t count : 64; /**< Current counter value */
5880 uint64_t count : 64;
5900 uint64_t u64;
5903 uint64_t count : 64; /**< Current counter value */
5905 uint64_t count : 64;
5956 uint64_t u64;
5959 uint64_t reserved_32_63 : 32;
5960 uint64_t cnt3sel : 8; /**< Selects event to count for L2C_TAD_PFC3 */
5961 uint64_t cnt2sel : 8; /**< Selects event to count for L2C_TAD_PFC2 */
5962 uint64_t cnt1sel : 8; /**< Selects event to count for L2C_TAD_PFC1 */
5963 uint64_t cnt0sel : 8; /**< Selects event to count for L2C_TAD_PFC0 */
5965 uint64_t cnt0sel : 8;
5966 uint64_t cnt1sel : 8;
5967 uint64_t cnt2sel : 8;
5968 uint64_t cnt3sel : 8;
5969 uint64_t reserved_32_63 : 32;
5998 uint64_t u64;
6001 uint64_t reserved_46_63 : 18;
6002 uint64_t ecc : 6; /**< The tag ECC */
6003 uint64_t reserved_36_39 : 4;
6004 uint64_t tag : 19; /**< The tag (see notes 1 and 3) */
6005 uint64_t reserved_4_16 : 13;
6006 uint64_t use : 1; /**< The LRU use bit */
6007 uint64_t valid : 1; /**< The valid bit */
6008 uint64_t dirty : 1; /**< The dirty bit */
6009 uint64_t lock : 1; /**< The lock bit */
6011 uint64_t lock : 1;
6012 uint64_t dirty : 1;
6013 uint64_t valid : 1;
6014 uint64_t use : 1;
6015 uint64_t reserved_4_16 : 13;
6016 uint64_t tag : 19;
6017 uint64_t reserved_36_39 : 4;
6018 uint64_t ecc : 6;
6019 uint64_t reserved_46_63 : 18;
6040 uint64_t u64;
6043 uint64_t mask : 64; /**< Mask of virtualization IDs which had a
6046 uint64_t mask : 64;
6067 uint64_t u64;
6070 uint64_t reserved_2_63 : 62;
6071 uint64_t mask : 2; /**< Mask of IOBs which had a HOLEWR/BIGWR/VRTWR error */
6073 uint64_t mask : 2;
6074 uint64_t reserved_2_63 : 62;
6079 uint64_t reserved_1_63 : 63;
6080 uint64_t mask : 1; /**< Mask of IOBs which had a HOLEWR/BIGWR/VRTWR error */
6082 uint64_t mask : 1;
6083 uint64_t reserved_1_63 : 63;
6103 uint64_t u64;
6106 uint64_t reserved_2_63 : 62;
6107 uint64_t invl2 : 1; /**< If set, a INVL2 caused HOLEWR/BIGWR/VRT* to set */
6108 uint64_t dwb : 1; /**< If set, a DWB caused HOLEWR/BIGWR/VRT* to set */
6110 uint64_t dwb : 1;
6111 uint64_t invl2 : 1;
6112 uint64_t reserved_2_63 : 62;
6132 uint64_t u64;
6135 uint64_t reserved_32_63 : 32;
6136 uint64_t mask : 32; /**< Mask of PPs which had a HOLEWR/BIGWR/VRTWR error */
6138 uint64_t mask : 32;
6139 uint64_t reserved_32_63 : 32;
6144 uint64_t reserved_4_63 : 60;
6145 uint64_t mask : 4; /**< Mask of PPs which had a HOLEWR/BIGWR/VRTWR error */
6147 uint64_t mask : 4;
6148 uint64_t reserved_4_63 : 60;
6153 uint64_t reserved_6_63 : 58;
6154 uint64_t mask : 6; /**< Mask of PPs which had a HOLEWR/BIGWR/VRTWR error */
6156 uint64_t mask : 6;
6157 uint64_t reserved_6_63 : 58;
6163 uint64_t reserved_10_63 : 54;
6164 uint64_t mask : 10; /**< Mask of PPs which had a HOLEWR/BIGWR/VRTWR error */
6166 uint64_t mask : 10;
6167 uint64_t reserved_10_63 : 54;
6184 uint64_t u64;
6187 uint64_t reserved_14_63 : 50;
6188 uint64_t dwbid : 6; /**< Virtualization ID to use for DWB commands */
6189 uint64_t reserved_6_7 : 2;
6190 uint64_t id : 6; /**< Virtualization ID to use for non-DWB commands */
6192 uint64_t id : 6;
6193 uint64_t reserved_6_7 : 2;
6194 uint64_t dwbid : 6;
6195 uint64_t reserved_14_63 : 50;
6216 uint64_t u64;
6219 uint64_t reserved_6_63 : 58;
6220 uint64_t id : 6; /**< Virtualization ID to use for this PP. */
6222 uint64_t id : 6;
6223 uint64_t reserved_6_63 : 58;
6243 uint64_t u64;
6246 uint64_t reserved_9_63 : 55;
6247 uint64_t ooberr : 1; /**< Whether out of bounds writes are an error
6253 uint64_t reserved_7_7 : 1;
6254 uint64_t memsz : 3; /**< Memory space coverage of L2C_VRT_MEM (encoded)
6263 uint64_t numid : 3; /**< Number of allowed virtualization IDs (encoded)
6273 uint64_t enable : 1; /**< Global virtualization enable
6278 uint64_t enable : 1;
6279 uint64_t numid : 3;
6280 uint64_t memsz : 3;
6281 uint64_t reserved_7_7 : 1;
6282 uint64_t ooberr : 1;
6283 uint64_t reserved_9_63 : 55;
6344 uint64_t u64;
6347 uint64_t reserved_36_63 : 28;
6348 uint64_t parity : 4; /**< Parity to write into (or read from) the
6351 uint64_t data : 32; /**< Data to write into (or read from) the
6354 uint64_t data : 32;
6355 uint64_t parity : 4;
6356 uint64_t reserved_36_63 : 28;
6380 uint64_t u64;
6383 uint64_t reserved_16_63 : 48;
6384 uint64_t mask : 16; /**< Way partitioning mask. (1 means do not use) */
6386 uint64_t mask : 16;
6387 uint64_t reserved_16_63 : 48;
6411 uint64_t u64;
6414 uint64_t reserved_16_63 : 48;
6415 uint64_t mask : 16; /**< Way partitioning mask. (1 means do not use) */
6417 uint64_t mask : 16;
6418 uint64_t reserved_16_63 : 48;
6438 uint64_t u64;
6441 uint64_t count : 64; /**< Current counter value */
6443 uint64_t count : 64;
6490 uint64_t u64;
6493 uint64_t inuse : 1; /**< Set to 1 by HW upon receiving a write, cleared when
6497 uint64_t cmd : 6; /**< Command to use for simulated XMC request
6499 uint64_t reserved_38_56 : 19;
6500 uint64_t addr : 38; /**< Address to use for simulated XMC request (see Note 6) */
6502 uint64_t addr : 38;
6503 uint64_t reserved_38_56 : 19;
6504 uint64_t cmd : 6;
6505 uint64_t inuse : 1;
6525 uint64_t u64;
6528 uint64_t count : 64; /**< Current counter value */
6530 uint64_t count : 64;