Lines Matching refs:uint64_t
57 static inline uint64_t CVMX_FPA_ADDR_RANGE_ERROR_FUNC(void)
70 static inline uint64_t CVMX_FPA_FPF0_MARKS_FUNC(void)
81 static inline uint64_t CVMX_FPA_FPF0_SIZE_FUNC(void)
99 static inline uint64_t CVMX_FPA_FPF8_MARKS_FUNC(void)
110 static inline uint64_t CVMX_FPA_FPF8_SIZE_FUNC(void)
120 static inline uint64_t CVMX_FPA_FPFX_MARKS(unsigned long offset)
138 static inline uint64_t CVMX_FPA_FPFX_SIZE(unsigned long offset)
159 static inline uint64_t CVMX_FPA_PACKET_THRESHOLD_FUNC(void)
169 static inline uint64_t CVMX_FPA_POOLX_END_ADDR(unsigned long offset)
183 static inline uint64_t CVMX_FPA_POOLX_START_ADDR(unsigned long offset)
197 static inline uint64_t CVMX_FPA_POOLX_THRESHOLD(unsigned long offset)
221 static inline uint64_t CVMX_FPA_QUE8_PAGE_INDEX_FUNC(void)
231 static inline uint64_t CVMX_FPA_QUEX_AVAILABLE(unsigned long offset)
253 static inline uint64_t CVMX_FPA_QUEX_PAGE_INDEX(unsigned long offset)
278 static inline uint64_t CVMX_FPA_WART_CTL_FUNC(void)
289 static inline uint64_t CVMX_FPA_WART_STATUS_FUNC(void)
300 static inline uint64_t CVMX_FPA_WQE_THRESHOLD_FUNC(void)
323 uint64_t u64;
326 uint64_t reserved_38_63 : 26;
327 uint64_t pool : 5; /**< Pool address sent to. */
328 uint64_t addr : 33; /**< Failing address. */
330 uint64_t addr : 33;
331 uint64_t pool : 5;
332 uint64_t reserved_38_63 : 26;
351 uint64_t u64;
354 uint64_t reserved_5_63 : 59;
355 uint64_t frd : 1; /**< fpa_frd memory bist status. */
356 uint64_t fpf0 : 1; /**< fpa_fpf0 memory bist status. */
357 uint64_t fpf1 : 1; /**< fpa_fpf1 memory bist status. */
358 uint64_t ffr : 1; /**< fpa_ffr memory bist status. */
359 uint64_t fdr : 1; /**< fpa_fdr memory bist status. */
361 uint64_t fdr : 1;
362 uint64_t ffr : 1;
363 uint64_t fpf1 : 1;
364 uint64_t fpf0 : 1;
365 uint64_t frd : 1;
366 uint64_t reserved_5_63 : 59;
398 uint64_t u64;
401 uint64_t reserved_21_63 : 43;
402 uint64_t free_en : 1; /**< Enables the setting of the INT_SUM_[FREE*] bits. */
403 uint64_t ret_off : 1; /**< When set NCB devices returning pointer will be
405 uint64_t req_off : 1; /**< When set NCB devices requesting pointers will be
407 uint64_t reset : 1; /**< When set causes a reset of the FPA with the */
408 uint64_t use_ldt : 1; /**< When clear '0' the FPA will use LDT to load
410 uint64_t use_stt : 1; /**< When clear '0' the FPA will use STT to store
412 uint64_t enb : 1; /**< Must be set to 1 AFTER writing all config registers
416 uint64_t mem1_err : 7; /**< Causes a flip of the ECC bit associated 38:32
419 uint64_t mem0_err : 7; /**< Causes a flip of the ECC bit associated 38:32
423 uint64_t mem0_err : 7;
424 uint64_t mem1_err : 7;
425 uint64_t enb : 1;
426 uint64_t use_stt : 1;
427 uint64_t use_ldt : 1;
428 uint64_t reset : 1;
429 uint64_t req_off : 1;
430 uint64_t ret_off : 1;
431 uint64_t free_en : 1;
432 uint64_t reserved_21_63 : 43;
437 uint64_t reserved_18_63 : 46;
438 uint64_t reset : 1; /**< When set causes a reset of the FPA with the
440 uint64_t use_ldt : 1; /**< When clear '0' the FPA will use LDT to load
442 uint64_t use_stt : 1; /**< When clear '0' the FPA will use STT to store
444 uint64_t enb : 1; /**< Must be set to 1 AFTER writing all config registers
448 uint64_t mem1_err : 7; /**< Causes a flip of the ECC bit associated 38:32
451 uint64_t mem0_err : 7; /**< Causes a flip of the ECC bit associated 38:32
455 uint64_t mem0_err : 7;
456 uint64_t mem1_err : 7;
457 uint64_t enb : 1;
458 uint64_t use_stt : 1;
459 uint64_t use_ldt : 1;
460 uint64_t reset : 1;
461 uint64_t reserved_18_63 : 46;
494 uint64_t u64;
497 uint64_t reserved_22_63 : 42;
498 uint64_t fpf_wr : 11; /**< When the number of free-page-pointers in a
503 uint64_t fpf_rd : 11; /**< When the number of free-page-pointers in a
511 uint64_t fpf_rd : 11;
512 uint64_t fpf_wr : 11;
513 uint64_t reserved_22_63 : 42;
542 uint64_t u64;
545 uint64_t reserved_11_63 : 53;
546 uint64_t fpf_siz : 11; /**< The number of entries assigned in the FPA FIFO
558 uint64_t fpf_siz : 11;
559 uint64_t reserved_11_63 : 53;
588 uint64_t u64;
591 uint64_t reserved_24_63 : 40;
592 uint64_t fpf_wr : 12; /**< When the number of free-page-pointers in a
597 uint64_t fpf_rd : 12; /**< When the number of free-page-pointers in a
605 uint64_t fpf_rd : 12;
606 uint64_t fpf_wr : 12;
607 uint64_t reserved_24_63 : 40;
636 uint64_t u64;
639 uint64_t reserved_12_63 : 52;
640 uint64_t fpf_siz : 12; /**< The number of entries assigned in the FPA FIFO
652 uint64_t fpf_siz : 12;
653 uint64_t reserved_12_63 : 52;
684 uint64_t u64;
687 uint64_t reserved_22_63 : 42;
688 uint64_t fpf_wr : 11; /**< When the number of free-page-pointers in a
693 uint64_t fpf_rd : 11; /**< When the number of free-page-pointers in a
701 uint64_t fpf_rd : 11;
702 uint64_t fpf_wr : 11;
703 uint64_t reserved_22_63 : 42;
721 uint64_t u64;
724 uint64_t reserved_12_63 : 52;
725 uint64_t fpf_siz : 12; /**< The number of entries assigned in the FPA FIFO
737 uint64_t fpf_siz : 12;
738 uint64_t reserved_12_63 : 52;
754 uint64_t u64;
757 uint64_t reserved_50_63 : 14;
758 uint64_t paddr_e : 1; /**< When set (1) and bit 49 of the FPA_INT_SUM
761 uint64_t reserved_44_48 : 5;
762 uint64_t free7 : 1; /**< When set (1) and bit 43 of the FPA_INT_SUM
765 uint64_t free6 : 1; /**< When set (1) and bit 42 of the FPA_INT_SUM
768 uint64_t free5 : 1; /**< When set (1) and bit 41 of the FPA_INT_SUM
771 uint64_t free4 : 1; /**< When set (1) and bit 40 of the FPA_INT_SUM
774 uint64_t free3 : 1; /**< When set (1) and bit 39 of the FPA_INT_SUM
777 uint64_t free2 : 1; /**< When set (1) and bit 38 of the FPA_INT_SUM
780 uint64_t free1 : 1; /**< When set (1) and bit 37 of the FPA_INT_SUM
783 uint64_t free0 : 1; /**< When set (1) and bit 36 of the FPA_INT_SUM
786 uint64_t pool7th : 1; /**< When set (1) and bit 35 of the FPA_INT_SUM
789 uint64_t pool6th : 1; /**< When set (1) and bit 34 of the FPA_INT_SUM
792 uint64_t pool5th : 1; /**< When set (1) and bit 33 of the FPA_INT_SUM
795 uint64_t pool4th : 1; /**< When set (1) and bit 32 of the FPA_INT_SUM
798 uint64_t pool3th : 1; /**< When set (1) and bit 31 of the FPA_INT_SUM
801 uint64_t pool2th : 1; /**< When set (1) and bit 30 of the FPA_INT_SUM
804 uint64_t pool1th : 1; /**< When set (1) and bit 29 of the FPA_INT_SUM
807 uint64_t pool0th : 1; /**< When set (1) and bit 28 of the FPA_INT_SUM
810 uint64_t q7_perr : 1; /**< When set (1) and bit 27 of the FPA_INT_SUM
813 uint64_t q7_coff : 1; /**< When set (1) and bit 26 of the FPA_INT_SUM
816 uint64_t q7_und : 1; /**< When set (1) and bit 25 of the FPA_INT_SUM
819 uint64_t q6_perr : 1; /**< When set (1) and bit 24 of the FPA_INT_SUM
822 uint64_t q6_coff : 1; /**< When set (1) and bit 23 of the FPA_INT_SUM
825 uint64_t q6_und : 1; /**< When set (1) and bit 22 of the FPA_INT_SUM
828 uint64_t q5_perr : 1; /**< When set (1) and bit 21 of the FPA_INT_SUM
831 uint64_t q5_coff : 1; /**< When set (1) and bit 20 of the FPA_INT_SUM
834 uint64_t q5_und : 1; /**< When set (1) and bit 19 of the FPA_INT_SUM
837 uint64_t q4_perr : 1; /**< When set (1) and bit 18 of the FPA_INT_SUM
840 uint64_t q4_coff : 1; /**< When set (1) and bit 17 of the FPA_INT_SUM
843 uint64_t q4_und : 1; /**< When set (1) and bit 16 of the FPA_INT_SUM
846 uint64_t q3_perr : 1; /**< When set (1) and bit 15 of the FPA_INT_SUM
849 uint64_t q3_coff : 1; /**< When set (1) and bit 14 of the FPA_INT_SUM
852 uint64_t q3_und : 1; /**< When set (1) and bit 13 of the FPA_INT_SUM
855 uint64_t q2_perr : 1; /**< When set (1) and bit 12 of the FPA_INT_SUM
858 uint64_t q2_coff : 1; /**< When set (1) and bit 11 of the FPA_INT_SUM
861 uint64_t q2_und : 1; /**< When set (1) and bit 10 of the FPA_INT_SUM
864 uint64_t q1_perr : 1; /**< When set (1) and bit 9 of the FPA_INT_SUM
867 uint64_t q1_coff : 1; /**< When set (1) and bit 8 of the FPA_INT_SUM
870 uint64_t q1_und : 1; /**< When set (1) and bit 7 of the FPA_INT_SUM
873 uint64_t q0_perr : 1; /**< When set (1) and bit 6 of the FPA_INT_SUM
876 uint64_t q0_coff : 1; /**< When set (1) and bit 5 of the FPA_INT_SUM
879 uint64_t q0_und : 1; /**< When set (1) and bit 4 of the FPA_INT_SUM
882 uint64_t fed1_dbe : 1; /**< When set (1) and bit 3 of the FPA_INT_SUM
885 uint64_t fed1_sbe : 1; /**< When set (1) and bit 2 of the FPA_INT_SUM
888 uint64_t fed0_dbe : 1; /**< When set (1) and bit 1 of the FPA_INT_SUM
891 uint64_t fed0_sbe : 1; /**< When set (1) and bit 0 of the FPA_INT_SUM
895 uint64_t fed0_sbe : 1;
896 uint64_t fed0_dbe : 1;
897 uint64_t fed1_sbe : 1;
898 uint64_t fed1_dbe : 1;
899 uint64_t q0_und : 1;
900 uint64_t q0_coff : 1;
901 uint64_t q0_perr : 1;
902 uint64_t q1_und : 1;
903 uint64_t q1_coff : 1;
904 uint64_t q1_perr : 1;
905 uint64_t q2_und : 1;
906 uint64_t q2_coff : 1;
907 uint64_t q2_perr : 1;
908 uint64_t q3_und : 1;
909 uint64_t q3_coff : 1;
910 uint64_t q3_perr : 1;
911 uint64_t q4_und : 1;
912 uint64_t q4_coff : 1;
913 uint64_t q4_perr : 1;
914 uint64_t q5_und : 1;
915 uint64_t q5_coff : 1;
916 uint64_t q5_perr : 1;
917 uint64_t q6_und : 1;
918 uint64_t q6_coff : 1;
919 uint64_t q6_perr : 1;
920 uint64_t q7_und : 1;
921 uint64_t q7_coff : 1;
922 uint64_t q7_perr : 1;
923 uint64_t pool0th : 1;
924 uint64_t pool1th : 1;
925 uint64_t pool2th : 1;
926 uint64_t pool3th : 1;
927 uint64_t pool4th : 1;
928 uint64_t pool5th : 1;
929 uint64_t pool6th : 1;
930 uint64_t pool7th : 1;
931 uint64_t free0 : 1;
932 uint64_t free1 : 1;
933 uint64_t free2 : 1;
934 uint64_t free3 : 1;
935 uint64_t free4 : 1;
936 uint64_t free5 : 1;
937 uint64_t free6 : 1;
938 uint64_t free7 : 1;
939 uint64_t reserved_44_48 : 5;
940 uint64_t paddr_e : 1;
941 uint64_t reserved_50_63 : 14;
946 uint64_t reserved_28_63 : 36;
947 uint64_t q7_perr : 1; /**< When set (1) and bit 27 of the FPA_INT_SUM
950 uint64_t q7_coff : 1; /**< When set (1) and bit 26 of the FPA_INT_SUM
953 uint64_t q7_und : 1; /**< When set (1) and bit 25 of the FPA_INT_SUM
956 uint64_t q6_perr : 1; /**< When set (1) and bit 24 of the FPA_INT_SUM
959 uint64_t q6_coff : 1; /**< When set (1) and bit 23 of the FPA_INT_SUM
962 uint64_t q6_und : 1; /**< When set (1) and bit 22 of the FPA_INT_SUM
965 uint64_t q5_perr : 1; /**< When set (1) and bit 21 of the FPA_INT_SUM
968 uint64_t q5_coff : 1; /**< When set (1) and bit 20 of the FPA_INT_SUM
971 uint64_t q5_und : 1; /**< When set (1) and bit 19 of the FPA_INT_SUM
974 uint64_t q4_perr : 1; /**< When set (1) and bit 18 of the FPA_INT_SUM
977 uint64_t q4_coff : 1; /**< When set (1) and bit 17 of the FPA_INT_SUM
980 uint64_t q4_und : 1; /**< When set (1) and bit 16 of the FPA_INT_SUM
983 uint64_t q3_perr : 1; /**< When set (1) and bit 15 of the FPA_INT_SUM
986 uint64_t q3_coff : 1; /**< When set (1) and bit 14 of the FPA_INT_SUM
989 uint64_t q3_und : 1; /**< When set (1) and bit 13 of the FPA_INT_SUM
992 uint64_t q2_perr : 1; /**< When set (1) and bit 12 of the FPA_INT_SUM
995 uint64_t q2_coff : 1; /**< When set (1) and bit 11 of the FPA_INT_SUM
998 uint64_t q2_und : 1; /**< When set (1) and bit 10 of the FPA_INT_SUM
1001 uint64_t q1_perr : 1; /**< When set (1) and bit 9 of the FPA_INT_SUM
1004 uint64_t q1_coff : 1; /**< When set (1) and bit 8 of the FPA_INT_SUM
1007 uint64_t q1_und : 1; /**< When set (1) and bit 7 of the FPA_INT_SUM
1010 uint64_t q0_perr : 1; /**< When set (1) and bit 6 of the FPA_INT_SUM
1013 uint64_t q0_coff : 1; /**< When set (1) and bit 5 of the FPA_INT_SUM
1016 uint64_t q0_und : 1; /**< When set (1) and bit 4 of the FPA_INT_SUM
1019 uint64_t fed1_dbe : 1; /**< When set (1) and bit 3 of the FPA_INT_SUM
1022 uint64_t fed1_sbe : 1; /**< When set (1) and bit 2 of the FPA_INT_SUM
1025 uint64_t fed0_dbe : 1; /**< When set (1) and bit 1 of the FPA_INT_SUM
1028 uint64_t fed0_sbe : 1; /**< When set (1) and bit 0 of the FPA_INT_SUM
1032 uint64_t fed0_sbe : 1;
1033 uint64_t fed0_dbe : 1;
1034 uint64_t fed1_sbe : 1;
1035 uint64_t fed1_dbe : 1;
1036 uint64_t q0_und : 1;
1037 uint64_t q0_coff : 1;
1038 uint64_t q0_perr : 1;
1039 uint64_t q1_und : 1;
1040 uint64_t q1_coff : 1;
1041 uint64_t q1_perr : 1;
1042 uint64_t q2_und : 1;
1043 uint64_t q2_coff : 1;
1044 uint64_t q2_perr : 1;
1045 uint64_t q3_und : 1;
1046 uint64_t q3_coff : 1;
1047 uint64_t q3_perr : 1;
1048 uint64_t q4_und : 1;
1049 uint64_t q4_coff : 1;
1050 uint64_t q4_perr : 1;
1051 uint64_t q5_und : 1;
1052 uint64_t q5_coff : 1;
1053 uint64_t q5_perr : 1;
1054 uint64_t q6_und : 1;
1055 uint64_t q6_coff : 1;
1056 uint64_t q6_perr : 1;
1057 uint64_t q7_und : 1;
1058 uint64_t q7_coff : 1;
1059 uint64_t q7_perr : 1;
1060 uint64_t reserved_28_63 : 36;
1075 uint64_t reserved_50_63 : 14;
1076 uint64_t paddr_e : 1; /**< When set (1) and bit 49 of the FPA_INT_SUM
1079 uint64_t res_44 : 5; /**< Reserved */
1080 uint64_t free7 : 1; /**< When set (1) and bit 43 of the FPA_INT_SUM
1083 uint64_t free6 : 1; /**< When set (1) and bit 42 of the FPA_INT_SUM
1086 uint64_t free5 : 1; /**< When set (1) and bit 41 of the FPA_INT_SUM
1089 uint64_t free4 : 1; /**< When set (1) and bit 40 of the FPA_INT_SUM
1092 uint64_t free3 : 1; /**< When set (1) and bit 39 of the FPA_INT_SUM
1095 uint64_t free2 : 1; /**< When set (1) and bit 38 of the FPA_INT_SUM
1098 uint64_t free1 : 1; /**< When set (1) and bit 37 of the FPA_INT_SUM
1101 uint64_t free0 : 1; /**< When set (1) and bit 36 of the FPA_INT_SUM
1104 uint64_t pool7th : 1; /**< When set (1) and bit 35 of the FPA_INT_SUM
1107 uint64_t pool6th : 1; /**< When set (1) and bit 34 of the FPA_INT_SUM
1110 uint64_t pool5th : 1; /**< When set (1) and bit 33 of the FPA_INT_SUM
1113 uint64_t pool4th : 1; /**< When set (1) and bit 32 of the FPA_INT_SUM
1116 uint64_t pool3th : 1; /**< When set (1) and bit 31 of the FPA_INT_SUM
1119 uint64_t pool2th : 1; /**< When set (1) and bit 30 of the FPA_INT_SUM
1122 uint64_t pool1th : 1; /**< When set (1) and bit 29 of the FPA_INT_SUM
1125 uint64_t pool0th : 1; /**< When set (1) and bit 28 of the FPA_INT_SUM
1128 uint64_t q7_perr : 1; /**< When set (1) and bit 27 of the FPA_INT_SUM
1131 uint64_t q7_coff : 1; /**< When set (1) and bit 26 of the FPA_INT_SUM
1134 uint64_t q7_und : 1; /**< When set (1) and bit 25 of the FPA_INT_SUM
1137 uint64_t q6_perr : 1; /**< When set (1) and bit 24 of the FPA_INT_SUM
1140 uint64_t q6_coff : 1; /**< When set (1) and bit 23 of the FPA_INT_SUM
1143 uint64_t q6_und : 1; /**< When set (1) and bit 22 of the FPA_INT_SUM
1146 uint64_t q5_perr : 1; /**< When set (1) and bit 21 of the FPA_INT_SUM
1149 uint64_t q5_coff : 1; /**< When set (1) and bit 20 of the FPA_INT_SUM
1152 uint64_t q5_und : 1; /**< When set (1) and bit 19 of the FPA_INT_SUM
1155 uint64_t q4_perr : 1; /**< When set (1) and bit 18 of the FPA_INT_SUM
1158 uint64_t q4_coff : 1; /**< When set (1) and bit 17 of the FPA_INT_SUM
1161 uint64_t q4_und : 1; /**< When set (1) and bit 16 of the FPA_INT_SUM
1164 uint64_t q3_perr : 1; /**< When set (1) and bit 15 of the FPA_INT_SUM
1167 uint64_t q3_coff : 1; /**< When set (1) and bit 14 of the FPA_INT_SUM
1170 uint64_t q3_und : 1; /**< When set (1) and bit 13 of the FPA_INT_SUM
1173 uint64_t q2_perr : 1; /**< When set (1) and bit 12 of the FPA_INT_SUM
1176 uint64_t q2_coff : 1; /**< When set (1) and bit 11 of the FPA_INT_SUM
1179 uint64_t q2_und : 1; /**< When set (1) and bit 10 of the FPA_INT_SUM
1182 uint64_t q1_perr : 1; /**< When set (1) and bit 9 of the FPA_INT_SUM
1185 uint64_t q1_coff : 1; /**< When set (1) and bit 8 of the FPA_INT_SUM
1188 uint64_t q1_und : 1; /**< When set (1) and bit 7 of the FPA_INT_SUM
1191 uint64_t q0_perr : 1; /**< When set (1) and bit 6 of the FPA_INT_SUM
1194 uint64_t q0_coff : 1; /**< When set (1) and bit 5 of the FPA_INT_SUM
1197 uint64_t q0_und : 1; /**< When set (1) and bit 4 of the FPA_INT_SUM
1200 uint64_t fed1_dbe : 1; /**< When set (1) and bit 3 of the FPA_INT_SUM
1203 uint64_t fed1_sbe : 1; /**< When set (1) and bit 2 of the FPA_INT_SUM
1206 uint64_t fed0_dbe : 1; /**< When set (1) and bit 1 of the FPA_INT_SUM
1209 uint64_t fed0_sbe : 1; /**< When set (1) and bit 0 of the FPA_INT_SUM
1213 uint64_t fed0_sbe : 1;
1214 uint64_t fed0_dbe : 1;
1215 uint64_t fed1_sbe : 1;
1216 uint64_t fed1_dbe : 1;
1217 uint64_t q0_und : 1;
1218 uint64_t q0_coff : 1;
1219 uint64_t q0_perr : 1;
1220 uint64_t q1_und : 1;
1221 uint64_t q1_coff : 1;
1222 uint64_t q1_perr : 1;
1223 uint64_t q2_und : 1;
1224 uint64_t q2_coff : 1;
1225 uint64_t q2_perr : 1;
1226 uint64_t q3_und : 1;
1227 uint64_t q3_coff : 1;
1228 uint64_t q3_perr : 1;
1229 uint64_t q4_und : 1;
1230 uint64_t q4_coff : 1;
1231 uint64_t q4_perr : 1;
1232 uint64_t q5_und : 1;
1233 uint64_t q5_coff : 1;
1234 uint64_t q5_perr : 1;
1235 uint64_t q6_und : 1;
1236 uint64_t q6_coff : 1;
1237 uint64_t q6_perr : 1;
1238 uint64_t q7_und : 1;
1239 uint64_t q7_coff : 1;
1240 uint64_t q7_perr : 1;
1241 uint64_t pool0th : 1;
1242 uint64_t pool1th : 1;
1243 uint64_t pool2th : 1;
1244 uint64_t pool3th : 1;
1245 uint64_t pool4th : 1;
1246 uint64_t pool5th : 1;
1247 uint64_t pool6th : 1;
1248 uint64_t pool7th : 1;
1249 uint64_t free0 : 1;
1250 uint64_t free1 : 1;
1251 uint64_t free2 : 1;
1252 uint64_t free3 : 1;
1253 uint64_t free4 : 1;
1254 uint64_t free5 : 1;
1255 uint64_t free6 : 1;
1256 uint64_t free7 : 1;
1257 uint64_t res_44 : 5;
1258 uint64_t paddr_e : 1;
1259 uint64_t reserved_50_63 : 14;
1264 uint64_t reserved_44_63 : 20;
1265 uint64_t free7 : 1; /**< When set (1) and bit 43 of the FPA_INT_SUM
1268 uint64_t free6 : 1; /**< When set (1) and bit 42 of the FPA_INT_SUM
1271 uint64_t free5 : 1; /**< When set (1) and bit 41 of the FPA_INT_SUM
1274 uint64_t free4 : 1; /**< When set (1) and bit 40 of the FPA_INT_SUM
1277 uint64_t free3 : 1; /**< When set (1) and bit 39 of the FPA_INT_SUM
1280 uint64_t free2 : 1; /**< When set (1) and bit 38 of the FPA_INT_SUM
1283 uint64_t free1 : 1; /**< When set (1) and bit 37 of the FPA_INT_SUM
1286 uint64_t free0 : 1; /**< When set (1) and bit 36 of the FPA_INT_SUM
1289 uint64_t pool7th : 1; /**< When set (1) and bit 35 of the FPA_INT_SUM
1292 uint64_t pool6th : 1; /**< When set (1) and bit 34 of the FPA_INT_SUM
1295 uint64_t pool5th : 1; /**< When set (1) and bit 33 of the FPA_INT_SUM
1298 uint64_t pool4th : 1; /**< When set (1) and bit 32 of the FPA_INT_SUM
1301 uint64_t pool3th : 1; /**< When set (1) and bit 31 of the FPA_INT_SUM
1304 uint64_t pool2th : 1; /**< When set (1) and bit 30 of the FPA_INT_SUM
1307 uint64_t pool1th : 1; /**< When set (1) and bit 29 of the FPA_INT_SUM
1310 uint64_t pool0th : 1; /**< When set (1) and bit 28 of the FPA_INT_SUM
1313 uint64_t q7_perr : 1; /**< When set (1) and bit 27 of the FPA_INT_SUM
1316 uint64_t q7_coff : 1; /**< When set (1) and bit 26 of the FPA_INT_SUM
1319 uint64_t q7_und : 1; /**< When set (1) and bit 25 of the FPA_INT_SUM
1322 uint64_t q6_perr : 1; /**< When set (1) and bit 24 of the FPA_INT_SUM
1325 uint64_t q6_coff : 1; /**< When set (1) and bit 23 of the FPA_INT_SUM
1328 uint64_t q6_und : 1; /**< When set (1) and bit 22 of the FPA_INT_SUM
1331 uint64_t q5_perr : 1; /**< When set (1) and bit 21 of the FPA_INT_SUM
1334 uint64_t q5_coff : 1; /**< When set (1) and bit 20 of the FPA_INT_SUM
1337 uint64_t q5_und : 1; /**< When set (1) and bit 19 of the FPA_INT_SUM
1340 uint64_t q4_perr : 1; /**< When set (1) and bit 18 of the FPA_INT_SUM
1343 uint64_t q4_coff : 1; /**< When set (1) and bit 17 of the FPA_INT_SUM
1346 uint64_t q4_und : 1; /**< When set (1) and bit 16 of the FPA_INT_SUM
1349 uint64_t q3_perr : 1; /**< When set (1) and bit 15 of the FPA_INT_SUM
1352 uint64_t q3_coff : 1; /**< When set (1) and bit 14 of the FPA_INT_SUM
1355 uint64_t q3_und : 1; /**< When set (1) and bit 13 of the FPA_INT_SUM
1358 uint64_t q2_perr : 1; /**< When set (1) and bit 12 of the FPA_INT_SUM
1361 uint64_t q2_coff : 1; /**< When set (1) and bit 11 of the FPA_INT_SUM
1364 uint64_t q2_und : 1; /**< When set (1) and bit 10 of the FPA_INT_SUM
1367 uint64_t q1_perr : 1; /**< When set (1) and bit 9 of the FPA_INT_SUM
1370 uint64_t q1_coff : 1; /**< When set (1) and bit 8 of the FPA_INT_SUM
1373 uint64_t q1_und : 1; /**< When set (1) and bit 7 of the FPA_INT_SUM
1376 uint64_t q0_perr : 1; /**< When set (1) and bit 6 of the FPA_INT_SUM
1379 uint64_t q0_coff : 1; /**< When set (1) and bit 5 of the FPA_INT_SUM
1382 uint64_t q0_und : 1; /**< When set (1) and bit 4 of the FPA_INT_SUM
1385 uint64_t fed1_dbe : 1; /**< When set (1) and bit 3 of the FPA_INT_SUM
1388 uint64_t fed1_sbe : 1; /**< When set (1) and bit 2 of the FPA_INT_SUM
1391 uint64_t fed0_dbe : 1; /**< When set (1) and bit 1 of the FPA_INT_SUM
1394 uint64_t fed0_sbe : 1; /**< When set (1) and bit 0 of the FPA_INT_SUM
1398 uint64_t fed0_sbe : 1;
1399 uint64_t fed0_dbe : 1;
1400 uint64_t fed1_sbe : 1;
1401 uint64_t fed1_dbe : 1;
1402 uint64_t q0_und : 1;
1403 uint64_t q0_coff : 1;
1404 uint64_t q0_perr : 1;
1405 uint64_t q1_und : 1;
1406 uint64_t q1_coff : 1;
1407 uint64_t q1_perr : 1;
1408 uint64_t q2_und : 1;
1409 uint64_t q2_coff : 1;
1410 uint64_t q2_perr : 1;
1411 uint64_t q3_und : 1;
1412 uint64_t q3_coff : 1;
1413 uint64_t q3_perr : 1;
1414 uint64_t q4_und : 1;
1415 uint64_t q4_coff : 1;
1416 uint64_t q4_perr : 1;
1417 uint64_t q5_und : 1;
1418 uint64_t q5_coff : 1;
1419 uint64_t q5_perr : 1;
1420 uint64_t q6_und : 1;
1421 uint64_t q6_coff : 1;
1422 uint64_t q6_perr : 1;
1423 uint64_t q7_und : 1;
1424 uint64_t q7_coff : 1;
1425 uint64_t q7_perr : 1;
1426 uint64_t pool0th : 1;
1427 uint64_t pool1th : 1;
1428 uint64_t pool2th : 1;
1429 uint64_t pool3th : 1;
1430 uint64_t pool4th : 1;
1431 uint64_t pool5th : 1;
1432 uint64_t pool6th : 1;
1433 uint64_t pool7th : 1;
1434 uint64_t free0 : 1;
1435 uint64_t free1 : 1;
1436 uint64_t free2 : 1;
1437 uint64_t free3 : 1;
1438 uint64_t free4 : 1;
1439 uint64_t free5 : 1;
1440 uint64_t free6 : 1;
1441 uint64_t free7 : 1;
1442 uint64_t reserved_44_63 : 20;
1449 uint64_t reserved_50_63 : 14;
1450 uint64_t paddr_e : 1; /**< When set (1) and bit 49 of the FPA_INT_SUM
1453 uint64_t pool8th : 1; /**< When set (1) and bit 48 of the FPA_INT_SUM
1456 uint64_t q8_perr : 1; /**< When set (1) and bit 47 of the FPA_INT_SUM
1459 uint64_t q8_coff : 1; /**< When set (1) and bit 46 of the FPA_INT_SUM
1462 uint64_t q8_und : 1; /**< When set (1) and bit 45 of the FPA_INT_SUM
1465 uint64_t free8 : 1; /**< When set (1) and bit 44 of the FPA_INT_SUM
1468 uint64_t free7 : 1; /**< When set (1) and bit 43 of the FPA_INT_SUM
1471 uint64_t free6 : 1; /**< When set (1) and bit 42 of the FPA_INT_SUM
1474 uint64_t free5 : 1; /**< When set (1) and bit 41 of the FPA_INT_SUM
1477 uint64_t free4 : 1; /**< When set (1) and bit 40 of the FPA_INT_SUM
1480 uint64_t free3 : 1; /**< When set (1) and bit 39 of the FPA_INT_SUM
1483 uint64_t free2 : 1; /**< When set (1) and bit 38 of the FPA_INT_SUM
1486 uint64_t free1 : 1; /**< When set (1) and bit 37 of the FPA_INT_SUM
1489 uint64_t free0 : 1; /**< When set (1) and bit 36 of the FPA_INT_SUM
1492 uint64_t pool7th : 1; /**< When set (1) and bit 35 of the FPA_INT_SUM
1495 uint64_t pool6th : 1; /**< When set (1) and bit 34 of the FPA_INT_SUM
1498 uint64_t pool5th : 1; /**< When set (1) and bit 33 of the FPA_INT_SUM
1501 uint64_t pool4th : 1; /**< When set (1) and bit 32 of the FPA_INT_SUM
1504 uint64_t pool3th : 1; /**< When set (1) and bit 31 of the FPA_INT_SUM
1507 uint64_t pool2th : 1; /**< When set (1) and bit 30 of the FPA_INT_SUM
1510 uint64_t pool1th : 1; /**< When set (1) and bit 29 of the FPA_INT_SUM
1513 uint64_t pool0th : 1; /**< When set (1) and bit 28 of the FPA_INT_SUM
1516 uint64_t q7_perr : 1; /**< When set (1) and bit 27 of the FPA_INT_SUM
1519 uint64_t q7_coff : 1; /**< When set (1) and bit 26 of the FPA_INT_SUM
1522 uint64_t q7_und : 1; /**< When set (1) and bit 25 of the FPA_INT_SUM
1525 uint64_t q6_perr : 1; /**< When set (1) and bit 24 of the FPA_INT_SUM
1528 uint64_t q6_coff : 1; /**< When set (1) and bit 23 of the FPA_INT_SUM
1531 uint64_t q6_und : 1; /**< When set (1) and bit 22 of the FPA_INT_SUM
1534 uint64_t q5_perr : 1; /**< When set (1) and bit 21 of the FPA_INT_SUM
1537 uint64_t q5_coff : 1; /**< When set (1) and bit 20 of the FPA_INT_SUM
1540 uint64_t q5_und : 1; /**< When set (1) and bit 19 of the FPA_INT_SUM
1543 uint64_t q4_perr : 1; /**< When set (1) and bit 18 of the FPA_INT_SUM
1546 uint64_t q4_coff : 1; /**< When set (1) and bit 17 of the FPA_INT_SUM
1549 uint64_t q4_und : 1; /**< When set (1) and bit 16 of the FPA_INT_SUM
1552 uint64_t q3_perr : 1; /**< When set (1) and bit 15 of the FPA_INT_SUM
1555 uint64_t q3_coff : 1; /**< When set (1) and bit 14 of the FPA_INT_SUM
1558 uint64_t q3_und : 1; /**< When set (1) and bit 13 of the FPA_INT_SUM
1561 uint64_t q2_perr : 1; /**< When set (1) and bit 12 of the FPA_INT_SUM
1564 uint64_t q2_coff : 1; /**< When set (1) and bit 11 of the FPA_INT_SUM
1567 uint64_t q2_und : 1; /**< When set (1) and bit 10 of the FPA_INT_SUM
1570 uint64_t q1_perr : 1; /**< When set (1) and bit 9 of the FPA_INT_SUM
1573 uint64_t q1_coff : 1; /**< When set (1) and bit 8 of the FPA_INT_SUM
1576 uint64_t q1_und : 1; /**< When set (1) and bit 7 of the FPA_INT_SUM
1579 uint64_t q0_perr : 1; /**< When set (1) and bit 6 of the FPA_INT_SUM
1582 uint64_t q0_coff : 1; /**< When set (1) and bit 5 of the FPA_INT_SUM
1585 uint64_t q0_und : 1; /**< When set (1) and bit 4 of the FPA_INT_SUM
1588 uint64_t fed1_dbe : 1; /**< When set (1) and bit 3 of the FPA_INT_SUM
1591 uint64_t fed1_sbe : 1; /**< When set (1) and bit 2 of the FPA_INT_SUM
1594 uint64_t fed0_dbe : 1; /**< When set (1) and bit 1 of the FPA_INT_SUM
1597 uint64_t fed0_sbe : 1; /**< When set (1) and bit 0 of the FPA_INT_SUM
1601 uint64_t fed0_sbe : 1;
1602 uint64_t fed0_dbe : 1;
1603 uint64_t fed1_sbe : 1;
1604 uint64_t fed1_dbe : 1;
1605 uint64_t q0_und : 1;
1606 uint64_t q0_coff : 1;
1607 uint64_t q0_perr : 1;
1608 uint64_t q1_und : 1;
1609 uint64_t q1_coff : 1;
1610 uint64_t q1_perr : 1;
1611 uint64_t q2_und : 1;
1612 uint64_t q2_coff : 1;
1613 uint64_t q2_perr : 1;
1614 uint64_t q3_und : 1;
1615 uint64_t q3_coff : 1;
1616 uint64_t q3_perr : 1;
1617 uint64_t q4_und : 1;
1618 uint64_t q4_coff : 1;
1619 uint64_t q4_perr : 1;
1620 uint64_t q5_und : 1;
1621 uint64_t q5_coff : 1;
1622 uint64_t q5_perr : 1;
1623 uint64_t q6_und : 1;
1624 uint64_t q6_coff : 1;
1625 uint64_t q6_perr : 1;
1626 uint64_t q7_und : 1;
1627 uint64_t q7_coff : 1;
1628 uint64_t q7_perr : 1;
1629 uint64_t pool0th : 1;
1630 uint64_t pool1th : 1;
1631 uint64_t pool2th : 1;
1632 uint64_t pool3th : 1;
1633 uint64_t pool4th : 1;
1634 uint64_t pool5th : 1;
1635 uint64_t pool6th : 1;
1636 uint64_t pool7th : 1;
1637 uint64_t free0 : 1;
1638 uint64_t free1 : 1;
1639 uint64_t free2 : 1;
1640 uint64_t free3 : 1;
1641 uint64_t free4 : 1;
1642 uint64_t free5 : 1;
1643 uint64_t free6 : 1;
1644 uint64_t free7 : 1;
1645 uint64_t free8 : 1;
1646 uint64_t q8_und : 1;
1647 uint64_t q8_coff : 1;
1648 uint64_t q8_perr : 1;
1649 uint64_t pool8th : 1;
1650 uint64_t paddr_e : 1;
1651 uint64_t reserved_50_63 : 14;
1667 uint64_t u64;
1670 uint64_t reserved_50_63 : 14;
1671 uint64_t paddr_e : 1; /**< Set when a pointer address does not fall in the
1674 uint64_t pool8th : 1; /**< Set when FPA_QUE8_AVAILABLE is equal to
1677 uint64_t q8_perr : 1; /**< Set when a Queue8 pointer read from the stack in
1679 uint64_t q8_coff : 1; /**< Set when a Queue8 stack end tag is present and
1682 uint64_t q8_und : 1; /**< Set when a Queue8 page count available goes
1684 uint64_t free8 : 1; /**< When a pointer for POOL8 is freed bit is set. */
1685 uint64_t free7 : 1; /**< When a pointer for POOL7 is freed bit is set. */
1686 uint64_t free6 : 1; /**< When a pointer for POOL6 is freed bit is set. */
1687 uint64_t free5 : 1; /**< When a pointer for POOL5 is freed bit is set. */
1688 uint64_t free4 : 1; /**< When a pointer for POOL4 is freed bit is set. */
1689 uint64_t free3 : 1; /**< When a pointer for POOL3 is freed bit is set. */
1690 uint64_t free2 : 1; /**< When a pointer for POOL2 is freed bit is set. */
1691 uint64_t free1 : 1; /**< When a pointer for POOL1 is freed bit is set. */
1692 uint64_t free0 : 1; /**< When a pointer for POOL0 is freed bit is set. */
1693 uint64_t pool7th : 1; /**< Set when FPA_QUE7_AVAILABLE is equal to
1696 uint64_t pool6th : 1; /**< Set when FPA_QUE6_AVAILABLE is equal to
1699 uint64_t pool5th : 1; /**< Set when FPA_QUE5_AVAILABLE is equal to
1702 uint64_t pool4th : 1; /**< Set when FPA_QUE4_AVAILABLE is equal to
1705 uint64_t pool3th : 1; /**< Set when FPA_QUE3_AVAILABLE is equal to
1708 uint64_t pool2th : 1; /**< Set when FPA_QUE2_AVAILABLE is equal to
1711 uint64_t pool1th : 1; /**< Set when FPA_QUE1_AVAILABLE is equal to
1714 uint64_t pool0th : 1; /**< Set when FPA_QUE0_AVAILABLE is equal to
1717 uint64_t q7_perr : 1; /**< Set when a Queue0 pointer read from the stack in
1719 uint64_t q7_coff : 1; /**< Set when a Queue0 stack end tag is present and
1722 uint64_t q7_und : 1; /**< Set when a Queue0 page count available goes
1724 uint64_t q6_perr : 1; /**< Set when a Queue0 pointer read from the stack in
1726 uint64_t q6_coff : 1; /**< Set when a Queue0 stack end tag is present and
1729 uint64_t q6_und : 1; /**< Set when a Queue0 page count available goes
1731 uint64_t q5_perr : 1; /**< Set when a Queue0 pointer read from the stack in
1733 uint64_t q5_coff : 1; /**< Set when a Queue0 stack end tag is present and
1736 uint64_t q5_und : 1; /**< Set when a Queue0 page count available goes
1738 uint64_t q4_perr : 1; /**< Set when a Queue0 pointer read from the stack in
1740 uint64_t q4_coff : 1; /**< Set when a Queue0 stack end tag is present and
1743 uint64_t q4_und : 1; /**< Set when a Queue0 page count available goes
1745 uint64_t q3_perr : 1; /**< Set when a Queue0 pointer read from the stack in
1747 uint64_t q3_coff : 1; /**< Set when a Queue0 stack end tag is present and
1750 uint64_t q3_und : 1; /**< Set when a Queue0 page count available goes
1752 uint64_t q2_perr : 1; /**< Set when a Queue0 pointer read from the stack in
1754 uint64_t q2_coff : 1; /**< Set when a Queue0 stack end tag is present and
1757 uint64_t q2_und : 1; /**< Set when a Queue0 page count available goes
1759 uint64_t q1_perr : 1; /**< Set when a Queue0 pointer read from the stack in
1761 uint64_t q1_coff : 1; /**< Set when a Queue0 stack end tag is present and
1764 uint64_t q1_und : 1; /**< Set when a Queue0 page count available goes
1766 uint64_t q0_perr : 1; /**< Set when a Queue0 pointer read from the stack in
1768 uint64_t q0_coff : 1; /**< Set when a Queue0 stack end tag is present and
1771 uint64_t q0_und : 1; /**< Set when a Queue0 page count available goes
1773 uint64_t fed1_dbe : 1; /**< Set when a Double Bit Error is detected in FPF1. */
1774 uint64_t fed1_sbe : 1; /**< Set when a Single Bit Error is detected in FPF1. */
1775 uint64_t fed0_dbe : 1; /**< Set when a Double Bit Error is detected in FPF0. */
1776 uint64_t fed0_sbe : 1; /**< Set when a Single Bit Error is detected in FPF0. */
1778 uint64_t fed0_sbe : 1;
1779 uint64_t fed0_dbe : 1;
1780 uint64_t fed1_sbe : 1;
1781 uint64_t fed1_dbe : 1;
1782 uint64_t q0_und : 1;
1783 uint64_t q0_coff : 1;
1784 uint64_t q0_perr : 1;
1785 uint64_t q1_und : 1;
1786 uint64_t q1_coff : 1;
1787 uint64_t q1_perr : 1;
1788 uint64_t q2_und : 1;
1789 uint64_t q2_coff : 1;
1790 uint64_t q2_perr : 1;
1791 uint64_t q3_und : 1;
1792 uint64_t q3_coff : 1;
1793 uint64_t q3_perr : 1;
1794 uint64_t q4_und : 1;
1795 uint64_t q4_coff : 1;
1796 uint64_t q4_perr : 1;
1797 uint64_t q5_und : 1;
1798 uint64_t q5_coff : 1;
1799 uint64_t q5_perr : 1;
1800 uint64_t q6_und : 1;
1801 uint64_t q6_coff : 1;
1802 uint64_t q6_perr : 1;
1803 uint64_t q7_und : 1;
1804 uint64_t q7_coff : 1;
1805 uint64_t q7_perr : 1;
1806 uint64_t pool0th : 1;
1807 uint64_t pool1th : 1;
1808 uint64_t pool2th : 1;
1809 uint64_t pool3th : 1;
1810 uint64_t pool4th : 1;
1811 uint64_t pool5th : 1;
1812 uint64_t pool6th : 1;
1813 uint64_t pool7th : 1;
1814 uint64_t free0 : 1;
1815 uint64_t free1 : 1;
1816 uint64_t free2 : 1;
1817 uint64_t free3 : 1;
1818 uint64_t free4 : 1;
1819 uint64_t free5 : 1;
1820 uint64_t free6 : 1;
1821 uint64_t free7 : 1;
1822 uint64_t free8 : 1;
1823 uint64_t q8_und : 1;
1824 uint64_t q8_coff : 1;
1825 uint64_t q8_perr : 1;
1826 uint64_t pool8th : 1;
1827 uint64_t paddr_e : 1;
1828 uint64_t reserved_50_63 : 14;
1833 uint64_t reserved_28_63 : 36;
1834 uint64_t q7_perr : 1; /**< Set when a Queue0 pointer read from the stack in
1836 uint64_t q7_coff : 1; /**< Set when a Queue0 stack end tag is present and
1839 uint64_t q7_und : 1; /**< Set when a Queue0 page count available goes
1841 uint64_t q6_perr : 1; /**< Set when a Queue0 pointer read from the stack in
1843 uint64_t q6_coff : 1; /**< Set when a Queue0 stack end tag is present and
1846 uint64_t q6_und : 1; /**< Set when a Queue0 page count available goes
1848 uint64_t q5_perr : 1; /**< Set when a Queue0 pointer read from the stack in
1850 uint64_t q5_coff : 1; /**< Set when a Queue0 stack end tag is present and
1853 uint64_t q5_und : 1; /**< Set when a Queue0 page count available goes
1855 uint64_t q4_perr : 1; /**< Set when a Queue0 pointer read from the stack in
1857 uint64_t q4_coff : 1; /**< Set when a Queue0 stack end tag is present and
1860 uint64_t q4_und : 1; /**< Set when a Queue0 page count available goes
1862 uint64_t q3_perr : 1; /**< Set when a Queue0 pointer read from the stack in
1864 uint64_t q3_coff : 1; /**< Set when a Queue0 stack end tag is present and
1867 uint64_t q3_und : 1; /**< Set when a Queue0 page count available goes
1869 uint64_t q2_perr : 1; /**< Set when a Queue0 pointer read from the stack in
1871 uint64_t q2_coff : 1; /**< Set when a Queue0 stack end tag is present and
1874 uint64_t q2_und : 1; /**< Set when a Queue0 page count available goes
1876 uint64_t q1_perr : 1; /**< Set when a Queue0 pointer read from the stack in
1878 uint64_t q1_coff : 1; /**< Set when a Queue0 stack end tag is present and
1881 uint64_t q1_und : 1; /**< Set when a Queue0 page count available goes
1883 uint64_t q0_perr : 1; /**< Set when a Queue0 pointer read from the stack in
1885 uint64_t q0_coff : 1; /**< Set when a Queue0 stack end tag is present and
1888 uint64_t q0_und : 1; /**< Set when a Queue0 page count available goes
1890 uint64_t fed1_dbe : 1; /**< Set when a Double Bit Error is detected in FPF1. */
1891 uint64_t fed1_sbe : 1; /**< Set when a Single Bit Error is detected in FPF1. */
1892 uint64_t fed0_dbe : 1; /**< Set when a Double Bit Error is detected in FPF0. */
1893 uint64_t fed0_sbe : 1; /**< Set when a Single Bit Error is detected in FPF0. */
1895 uint64_t fed0_sbe : 1;
1896 uint64_t fed0_dbe : 1;
1897 uint64_t fed1_sbe : 1;
1898 uint64_t fed1_dbe : 1;
1899 uint64_t q0_und : 1;
1900 uint64_t q0_coff : 1;
1901 uint64_t q0_perr : 1;
1902 uint64_t q1_und : 1;
1903 uint64_t q1_coff : 1;
1904 uint64_t q1_perr : 1;
1905 uint64_t q2_und : 1;
1906 uint64_t q2_coff : 1;
1907 uint64_t q2_perr : 1;
1908 uint64_t q3_und : 1;
1909 uint64_t q3_coff : 1;
1910 uint64_t q3_perr : 1;
1911 uint64_t q4_und : 1;
1912 uint64_t q4_coff : 1;
1913 uint64_t q4_perr : 1;
1914 uint64_t q5_und : 1;
1915 uint64_t q5_coff : 1;
1916 uint64_t q5_perr : 1;
1917 uint64_t q6_und : 1;
1918 uint64_t q6_coff : 1;
1919 uint64_t q6_perr : 1;
1920 uint64_t q7_und : 1;
1921 uint64_t q7_coff : 1;
1922 uint64_t q7_perr : 1;
1923 uint64_t reserved_28_63 : 36;
1938 uint64_t reserved_50_63 : 14;
1939 uint64_t paddr_e : 1; /**< Set when a pointer address does not fall in the
1942 uint64_t reserved_44_48 : 5;
1943 uint64_t free7 : 1; /**< When a pointer for POOL7 is freed bit is set. */
1944 uint64_t free6 : 1; /**< When a pointer for POOL6 is freed bit is set. */
1945 uint64_t free5 : 1; /**< When a pointer for POOL5 is freed bit is set. */
1946 uint64_t free4 : 1; /**< When a pointer for POOL4 is freed bit is set. */
1947 uint64_t free3 : 1; /**< When a pointer for POOL3 is freed bit is set. */
1948 uint64_t free2 : 1; /**< When a pointer for POOL2 is freed bit is set. */
1949 uint64_t free1 : 1; /**< When a pointer for POOL1 is freed bit is set. */
1950 uint64_t free0 : 1; /**< When a pointer for POOL0 is freed bit is set. */
1951 uint64_t pool7th : 1; /**< Set when FPA_QUE7_AVAILABLE is equal to
1954 uint64_t pool6th : 1; /**< Set when FPA_QUE6_AVAILABLE is equal to
1957 uint64_t pool5th : 1; /**< Set when FPA_QUE5_AVAILABLE is equal to
1960 uint64_t pool4th : 1; /**< Set when FPA_QUE4_AVAILABLE is equal to
1963 uint64_t pool3th : 1; /**< Set when FPA_QUE3_AVAILABLE is equal to
1966 uint64_t pool2th : 1; /**< Set when FPA_QUE2_AVAILABLE is equal to
1969 uint64_t pool1th : 1; /**< Set when FPA_QUE1_AVAILABLE is equal to
1972 uint64_t pool0th : 1; /**< Set when FPA_QUE0_AVAILABLE is equal to
1975 uint64_t q7_perr : 1; /**< Set when a Queue0 pointer read from the stack in
1977 uint64_t q7_coff : 1; /**< Set when a Queue0 stack end tag is present and
1980 uint64_t q7_und : 1; /**< Set when a Queue0 page count available goes
1982 uint64_t q6_perr : 1; /**< Set when a Queue0 pointer read from the stack in
1984 uint64_t q6_coff : 1; /**< Set when a Queue0 stack end tag is present and
1987 uint64_t q6_und : 1; /**< Set when a Queue0 page count available goes
1989 uint64_t q5_perr : 1; /**< Set when a Queue0 pointer read from the stack in
1991 uint64_t q5_coff : 1; /**< Set when a Queue0 stack end tag is present and
1994 uint64_t q5_und : 1; /**< Set when a Queue0 page count available goes
1996 uint64_t q4_perr : 1; /**< Set when a Queue0 pointer read from the stack in
1998 uint64_t q4_coff : 1; /**< Set when a Queue0 stack end tag is present and
2001 uint64_t q4_und : 1; /**< Set when a Queue0 page count available goes
2003 uint64_t q3_perr : 1; /**< Set when a Queue0 pointer read from the stack in
2005 uint64_t q3_coff : 1; /**< Set when a Queue0 stack end tag is present and
2008 uint64_t q3_und : 1; /**< Set when a Queue0 page count available goes
2010 uint64_t q2_perr : 1; /**< Set when a Queue0 pointer read from the stack in
2012 uint64_t q2_coff : 1; /**< Set when a Queue0 stack end tag is present and
2015 uint64_t q2_und : 1; /**< Set when a Queue0 page count available goes
2017 uint64_t q1_perr : 1; /**< Set when a Queue0 pointer read from the stack in
2019 uint64_t q1_coff : 1; /**< Set when a Queue0 stack end tag is present and
2022 uint64_t q1_und : 1; /**< Set when a Queue0 page count available goes
2024 uint64_t q0_perr : 1; /**< Set when a Queue0 pointer read from the stack in
2026 uint64_t q0_coff : 1; /**< Set when a Queue0 stack end tag is present and
2029 uint64_t q0_und : 1; /**< Set when a Queue0 page count available goes
2031 uint64_t fed1_dbe : 1; /**< Set when a Double Bit Error is detected in FPF1. */
2032 uint64_t fed1_sbe : 1; /**< Set when a Single Bit Error is detected in FPF1. */
2033 uint64_t fed0_dbe : 1; /**< Set when a Double Bit Error is detected in FPF0. */
2034 uint64_t fed0_sbe : 1; /**< Set when a Single Bit Error is detected in FPF0. */
2036 uint64_t fed0_sbe : 1;
2037 uint64_t fed0_dbe : 1;
2038 uint64_t fed1_sbe : 1;
2039 uint64_t fed1_dbe : 1;
2040 uint64_t q0_und : 1;
2041 uint64_t q0_coff : 1;
2042 uint64_t q0_perr : 1;
2043 uint64_t q1_und : 1;
2044 uint64_t q1_coff : 1;
2045 uint64_t q1_perr : 1;
2046 uint64_t q2_und : 1;
2047 uint64_t q2_coff : 1;
2048 uint64_t q2_perr : 1;
2049 uint64_t q3_und : 1;
2050 uint64_t q3_coff : 1;
2051 uint64_t q3_perr : 1;
2052 uint64_t q4_und : 1;
2053 uint64_t q4_coff : 1;
2054 uint64_t q4_perr : 1;
2055 uint64_t q5_und : 1;
2056 uint64_t q5_coff : 1;
2057 uint64_t q5_perr : 1;
2058 uint64_t q6_und : 1;
2059 uint64_t q6_coff : 1;
2060 uint64_t q6_perr : 1;
2061 uint64_t q7_und : 1;
2062 uint64_t q7_coff : 1;
2063 uint64_t q7_perr : 1;
2064 uint64_t pool0th : 1;
2065 uint64_t pool1th : 1;
2066 uint64_t pool2th : 1;
2067 uint64_t pool3th : 1;
2068 uint64_t pool4th : 1;
2069 uint64_t pool5th : 1;
2070 uint64_t pool6th : 1;
2071 uint64_t pool7th : 1;
2072 uint64_t free0 : 1;
2073 uint64_t free1 : 1;
2074 uint64_t free2 : 1;
2075 uint64_t free3 : 1;
2076 uint64_t free4 : 1;
2077 uint64_t free5 : 1;
2078 uint64_t free6 : 1;
2079 uint64_t free7 : 1;
2080 uint64_t reserved_44_48 : 5;
2081 uint64_t paddr_e : 1;
2082 uint64_t reserved_50_63 : 14;
2087 uint64_t reserved_44_63 : 20;
2088 uint64_t free7 : 1; /**< When a pointer for POOL7 is freed bit is set. */
2089 uint64_t free6 : 1; /**< When a pointer for POOL6 is freed bit is set. */
2090 uint64_t free5 : 1; /**< When a pointer for POOL5 is freed bit is set. */
2091 uint64_t free4 : 1; /**< When a pointer for POOL4 is freed bit is set. */
2092 uint64_t free3 : 1; /**< When a pointer for POOL3 is freed bit is set. */
2093 uint64_t free2 : 1; /**< When a pointer for POOL2 is freed bit is set. */
2094 uint64_t free1 : 1; /**< When a pointer for POOL1 is freed bit is set. */
2095 uint64_t free0 : 1; /**< When a pointer for POOL0 is freed bit is set. */
2096 uint64_t pool7th : 1; /**< Set when FPA_QUE7_AVAILABLE is equal to
2099 uint64_t pool6th : 1; /**< Set when FPA_QUE6_AVAILABLE is equal to
2102 uint64_t pool5th : 1; /**< Set when FPA_QUE5_AVAILABLE is equal to
2105 uint64_t pool4th : 1; /**< Set when FPA_QUE4_AVAILABLE is equal to
2108 uint64_t pool3th : 1; /**< Set when FPA_QUE3_AVAILABLE is equal to
2111 uint64_t pool2th : 1; /**< Set when FPA_QUE2_AVAILABLE is equal to
2114 uint64_t pool1th : 1; /**< Set when FPA_QUE1_AVAILABLE is equal to
2117 uint64_t pool0th : 1; /**< Set when FPA_QUE0_AVAILABLE is equal to
2120 uint64_t q7_perr : 1; /**< Set when a Queue0 pointer read from the stack in
2122 uint64_t q7_coff : 1; /**< Set when a Queue0 stack end tag is present and
2125 uint64_t q7_und : 1; /**< Set when a Queue0 page count available goes
2127 uint64_t q6_perr : 1; /**< Set when a Queue0 pointer read from the stack in
2129 uint64_t q6_coff : 1; /**< Set when a Queue0 stack end tag is present and
2132 uint64_t q6_und : 1; /**< Set when a Queue0 page count available goes
2134 uint64_t q5_perr : 1; /**< Set when a Queue0 pointer read from the stack in
2136 uint64_t q5_coff : 1; /**< Set when a Queue0 stack end tag is present and
2139 uint64_t q5_und : 1; /**< Set when a Queue0 page count available goes
2141 uint64_t q4_perr : 1; /**< Set when a Queue0 pointer read from the stack in
2143 uint64_t q4_coff : 1; /**< Set when a Queue0 stack end tag is present and
2146 uint64_t q4_und : 1; /**< Set when a Queue0 page count available goes
2148 uint64_t q3_perr : 1; /**< Set when a Queue0 pointer read from the stack in
2150 uint64_t q3_coff : 1; /**< Set when a Queue0 stack end tag is present and
2153 uint64_t q3_und : 1; /**< Set when a Queue0 page count available goes
2155 uint64_t q2_perr : 1; /**< Set when a Queue0 pointer read from the stack in
2157 uint64_t q2_coff : 1; /**< Set when a Queue0 stack end tag is present and
2160 uint64_t q2_und : 1; /**< Set when a Queue0 page count available goes
2162 uint64_t q1_perr : 1; /**< Set when a Queue0 pointer read from the stack in
2164 uint64_t q1_coff : 1; /**< Set when a Queue0 stack end tag is present and
2167 uint64_t q1_und : 1; /**< Set when a Queue0 page count available goes
2169 uint64_t q0_perr : 1; /**< Set when a Queue0 pointer read from the stack in
2171 uint64_t q0_coff : 1; /**< Set when a Queue0 stack end tag is present and
2174 uint64_t q0_und : 1; /**< Set when a Queue0 page count available goes
2176 uint64_t fed1_dbe : 1; /**< Set when a Double Bit Error is detected in FPF1. */
2177 uint64_t fed1_sbe : 1; /**< Set when a Single Bit Error is detected in FPF1. */
2178 uint64_t fed0_dbe : 1; /**< Set when a Double Bit Error is detected in FPF0. */
2179 uint64_t fed0_sbe : 1; /**< Set when a Single Bit Error is detected in FPF0. */
2181 uint64_t fed0_sbe : 1;
2182 uint64_t fed0_dbe : 1;
2183 uint64_t fed1_sbe : 1;
2184 uint64_t fed1_dbe : 1;
2185 uint64_t q0_und : 1;
2186 uint64_t q0_coff : 1;
2187 uint64_t q0_perr : 1;
2188 uint64_t q1_und : 1;
2189 uint64_t q1_coff : 1;
2190 uint64_t q1_perr : 1;
2191 uint64_t q2_und : 1;
2192 uint64_t q2_coff : 1;
2193 uint64_t q2_perr : 1;
2194 uint64_t q3_und : 1;
2195 uint64_t q3_coff : 1;
2196 uint64_t q3_perr : 1;
2197 uint64_t q4_und : 1;
2198 uint64_t q4_coff : 1;
2199 uint64_t q4_perr : 1;
2200 uint64_t q5_und : 1;
2201 uint64_t q5_coff : 1;
2202 uint64_t q5_perr : 1;
2203 uint64_t q6_und : 1;
2204 uint64_t q6_coff : 1;
2205 uint64_t q6_perr : 1;
2206 uint64_t q7_und : 1;
2207 uint64_t q7_coff : 1;
2208 uint64_t q7_perr : 1;
2209 uint64_t pool0th : 1;
2210 uint64_t pool1th : 1;
2211 uint64_t pool2th : 1;
2212 uint64_t pool3th : 1;
2213 uint64_t pool4th : 1;
2214 uint64_t pool5th : 1;
2215 uint64_t pool6th : 1;
2216 uint64_t pool7th : 1;
2217 uint64_t free0 : 1;
2218 uint64_t free1 : 1;
2219 uint64_t free2 : 1;
2220 uint64_t free3 : 1;
2221 uint64_t free4 : 1;
2222 uint64_t free5 : 1;
2223 uint64_t free6 : 1;
2224 uint64_t free7 : 1;
2225 uint64_t reserved_44_63 : 20;
2246 uint64_t u64;
2249 uint64_t reserved_32_63 : 32;
2250 uint64_t thresh : 32; /**< Packet Threshold. */
2252 uint64_t thresh : 32;
2253 uint64_t reserved_32_63 : 32;
2275 uint64_t u64;
2278 uint64_t reserved_33_63 : 31;
2279 uint64_t addr : 33; /**< Address. */
2281 uint64_t addr : 33;
2282 uint64_t reserved_33_63 : 31;
2301 uint64_t u64;
2304 uint64_t reserved_33_63 : 31;
2305 uint64_t addr : 33; /**< Address. */
2307 uint64_t addr : 33;
2308 uint64_t reserved_33_63 : 31;
2328 uint64_t u64;
2331 uint64_t reserved_32_63 : 32;
2332 uint64_t thresh : 32; /**< The Threshold. */
2334 uint64_t thresh : 32;
2335 uint64_t reserved_32_63 : 32;
2340 uint64_t reserved_29_63 : 35;
2341 uint64_t thresh : 29; /**< The Threshold. */
2343 uint64_t thresh : 29;
2344 uint64_t reserved_29_63 : 35;
2363 uint64_t u64;
2366 uint64_t reserved_32_63 : 32;
2367 uint64_t que_siz : 32; /**< The number of free pages available in this Queue.
2370 uint64_t que_siz : 32;
2371 uint64_t reserved_32_63 : 32;
2376 uint64_t reserved_29_63 : 35;
2377 uint64_t que_siz : 29; /**< The number of free pages available in this Queue. */
2379 uint64_t que_siz : 29;
2380 uint64_t reserved_29_63 : 35;
2413 uint64_t u64;
2416 uint64_t reserved_25_63 : 39;
2417 uint64_t pg_num : 25; /**< Page number. */
2419 uint64_t pg_num : 25;
2420 uint64_t reserved_25_63 : 39;
2455 uint64_t u64;
2458 uint64_t reserved_25_63 : 39;
2459 uint64_t pg_num : 25; /**< Page number. */
2461 uint64_t pg_num : 25;
2462 uint64_t reserved_25_63 : 39;
2479 uint64_t u64;
2482 uint64_t reserved_29_63 : 35;
2483 uint64_t act_que : 3; /**< FPA-queue-number read from memory. */
2484 uint64_t act_indx : 26; /**< Page number read from memory. */
2486 uint64_t act_indx : 26;
2487 uint64_t act_que : 3;
2488 uint64_t reserved_29_63 : 35;
2521 uint64_t u64;
2524 uint64_t reserved_29_63 : 35;
2525 uint64_t exp_que : 3; /**< Expected fpa-queue-number read from memory. */
2526 uint64_t exp_indx : 26; /**< Expected page number read from memory. */
2528 uint64_t exp_indx : 26;
2529 uint64_t exp_que : 3;
2530 uint64_t reserved_29_63 : 35;
2562 uint64_t u64;
2565 uint64_t reserved_16_63 : 48;
2566 uint64_t ctl : 16; /**< Control information. */
2568 uint64_t ctl : 16;
2569 uint64_t reserved_16_63 : 48;
2594 uint64_t u64;
2597 uint64_t reserved_32_63 : 32;
2598 uint64_t status : 32; /**< Status information. */
2600 uint64_t status : 32;
2601 uint64_t reserved_32_63 : 32;
2628 uint64_t u64;
2631 uint64_t reserved_32_63 : 32;
2632 uint64_t thresh : 32; /**< WQE Threshold. */
2634 uint64_t thresh : 32;
2635 uint64_t reserved_32_63 : 32;