Lines Matching refs:AL_REG_MASK_SET
1729 AL_REG_MASK_SET(mac_ctrl, ETH_1G_MAC_CMD_CFG_HD_EN);
1734 AL_REG_MASK_SET(mac_ctrl, ETH_1G_MAC_CMD_CFG_1G_SPD);
1739 AL_REG_MASK_SET(mac_ctrl, ETH_1G_MAC_CMD_CFG_10M_SPD);
1781 AL_REG_MASK_SET(control, ETH_10G_MAC_CONTROL_AN_EN_MASK);
1788 AL_REG_MASK_SET(if_mode, ETH_10G_MAC_IF_MODE_SGMII_EN_MASK);
1790 AL_REG_MASK_SET(if_mode, ETH_10G_MAC_IF_MODE_SGMII_AN_MASK);
3220 AL_REG_MASK_SET(reg, EC_RFW_OUT_CFG_DROP_EN);
3234 AL_REG_MASK_SET(reg, EC_EPE_A_PROT_ACT_DROP);
4289 AL_REG_MASK_SET(reg, AL_ADAPTER_GENERIC_CONTROL_0_ETH_RESET_1GMAC);
4327 AL_REG_MASK_SET(reg, AL_ADAPTER_GENERIC_CONTROL_0_ETH_RESET_1GMAC);
4341 AL_REG_MASK_SET(reg, 0xF0);