Lines Matching refs:uint_t
81 uint_t it_suffix:1; /* mnem + "w", "l", or "d" */
84 uint_t it_size:16;
86 uint_t it_invalid64:1; /* opcode invalid in amd64 */
87 uint_t it_always64:1; /* 64 bit when in 64 bit mode */
88 uint_t it_invalid32:1; /* invalid in IA32 */
89 uint_t it_stackop:1; /* push/pop stack operation */
90 uint_t it_vexwoxmm:1; /* VEX instructions that don't use XMM/YMM */
91 uint_t it_avxsuf:1; /* AVX suffix required */
2345 uint_t dgr_arg0; /* src reg */
2346 uint_t dgr_arg1; /* vsib reg */
2347 uint_t dgr_arg2; /* dst reg */
2406 dtrace_get_opcode(dis86_t *x, uint_t *high, uint_t *low)
2432 dtrace_get_SIB(dis86_t *x, uint_t *ss, uint_t *index, uint_t *base)
2456 dtrace_get_modrm(dis86_t *x, uint_t *mode, uint_t *reg, uint_t *r_m)
2471 dtrace_rex_adjust(uint_t rex_prefix, uint_t mode, uint_t *reg, uint_t *r_m)
2490 dtrace_vex_adjust(uint_t vex_byte1, uint_t mode, uint_t *reg, uint_t *r_m)
2612 dtrace_get_operand(dis86_t *x, uint_t mode, uint_t r_m, int wbit, int opindex)
2615 uint_t ss; /* scale-factor from opcode */
2616 uint_t index; /* index register number */
2617 uint_t base; /* base register number */
2771 uint_t need_paren = 0;
2891 dtrace_disx86(dis86_t *x, uint_t cpu_mode)
2895 uint_t i;
2898 uint_t nomem = 0;
2903 uint_t opnd_size; /* SIZE16, SIZE32 or SIZE64 */
2904 uint_t addr_size; /* SIZE16, SIZE32 or SIZE64 */
2905 uint_t wbit; /* opcode wbit, 0 is 8 bit, !0 for opnd_size */
2906 uint_t w2; /* wbit value for second operand */
2907 uint_t vbit;
2908 uint_t mode = 0; /* mode value from ModRM byte */
2909 uint_t reg; /* reg value from ModRM byte */
2910 uint_t r_m; /* r_m value from ModRM byte */
2912 uint_t opcode1; /* high nibble of 1st byte */
2913 uint_t opcode2; /* low nibble of 1st byte */
2914 uint_t opcode3; /* extra opcode bits usually from ModRM byte */
2915 uint_t opcode4; /* high nibble of 2nd byte */
2916 uint_t opcode5; /* low nibble of 2nd byte */
2917 uint_t opcode6; /* high nibble of 3rd byte */
2918 uint_t opcode7; /* low nibble of 3rd byte */
2919 uint_t opcode_bytes = 1;
2924 uint_t opnd_size_prefix = 0;
2925 uint_t addr_size_prefix = 0;
2926 uint_t segment_prefix = 0;
2927 uint_t lock_prefix = 0;
2928 uint_t rep_prefix = 0;
2929 uint_t rex_prefix = 0; /* amd64 register extension prefix */
2936 uint_t vex_prefix = 0;
2942 uint_t vex_byte1 = 0;
2948 uint_t vex_prefetch = 0;
2950 uint_t vex_m = 0;
2951 uint_t vex_v = 0;
2952 uint_t vex_p = 0;
2953 uint_t vex_R = 1;
2954 uint_t vex_X = 1;
2955 uint_t vex_B = 1;
2956 uint_t vex_W = 0;
2957 uint_t vex_L;
3019 uint_t *which_prefix = NULL;
3270 uint_t subcode;
5436 dtrace_disx86_str(dis86_t *dis, uint_t mode, uint64_t pc, char *buf,