Lines Matching defs:vbit
2823 * vbit indicates direction (0 for "opcode r,r_m") or (1 for "opcode r_m, r")
2825 #define STANDARD_MODRM(x, mode, reg, r_m, rex_prefix, wbit, vbit) { \
2828 dtrace_get_operand(x, mode, r_m, wbit, vbit); \
2829 dtrace_get_operand(x, REG_ONLY, reg, wbit, 1 - vbit); \
2838 #define MIXED_MM(x, mode, reg, r_m, rex_prefix, wbit, w2, vbit) { \
2841 dtrace_get_operand(x, mode, r_m, wbit, vbit); \
2842 dtrace_get_operand(x, REG_ONLY, reg, w2, 1 - vbit); \
2847 * vbit indicates direction
2851 #define THREEOPERAND(x, mode, reg, r_m, rex_prefix, wbit, w2, immsize, vbit) { \
2854 dtrace_get_operand(x, mode, r_m, wbit, 2-vbit); \
2855 dtrace_get_operand(x, REG_ONLY, reg, w2, 1+vbit); \
2907 uint_t vbit;
3701 vbit = 0; /* initialize for mem/reg -> reg */
3899 vbit = 1;
3905 dtrace_get_operand(x, REG_ONLY, EAX_REGNO, wbit, 1 - vbit);
3906 dtrace_imm_opnd(x, wbit, OPSIZE64(addr_size, LONG_OPND), vbit);
3908 x->d86_opnd[vbit].d86_mode = MODE_OFFSET;
3915 vbit = 1;
3922 dtrace_get_operand(x, mode, r_m, LONG_OPND, vbit);
3923 dtrace_get_operand(x, REG_ONLY, reg, SEG_OPND, 1 - vbit);
3931 vbit = VBIT(opcode2);
3936 if (vbit) {
4134 /* move special register to register or reverse if vbit */
4139 vbit = 1;
4146 vbit = 1;
4153 vbit = 1;
4162 dtrace_get_operand(x, REG_ONLY, reg, wbit, vbit);
4163 dtrace_get_operand(x, REG_ONLY, r_m, LONG_OPND, 1 - vbit);
4771 vbit = opcode2 >> 2 & 0x1; /* vbit = 1: st -> st(i) */
4773 case FFC: /* case for vbit always = 0 */
4776 (void) strlcat(x->d86_opnd[1 - vbit].d86_opnd, "%st", OPLEN);
4777 (void) strlcat(x->d86_opnd[vbit].d86_opnd, "%st(X)", OPLEN);
4778 x->d86_opnd[vbit].d86_opnd[4] = r_m + '0';
5060 vbit = 2;
5063 vbit = 1;
5068 dtrace_get_operand(x, REG_ONLY, reg, LONG_OPND, vbit);
5069 dtrace_get_operand(x, mode, r_m, wbit, vbit - 1);
5071 if (vbit == 2)
5184 vbit = 1;
5185 dtrace_get_operand(x, mode, r_m, wbit, vbit);
5186 dtrace_get_operand(x, REG_ONLY, reg, wbit, vbit - 1);