Lines Matching refs:TWL_REGULATOR_ADJUSTABLE
170 #define TWL_REGULATOR_ADJUSTABLE(name, subdev, reg, voltages) \
176 TWL_REGULATOR_ADJUSTABLE("vaux1", 0, 0x17, twl4030_vaux1_voltages),
177 TWL_REGULATOR_ADJUSTABLE("vaux2", 0, 0x1B, twl4030_vaux2_voltages),
178 TWL_REGULATOR_ADJUSTABLE("vaux3", 0, 0x1F, twl4030_vaux3_voltages),
179 TWL_REGULATOR_ADJUSTABLE("vaux4", 0, 0x23, twl4030_vaux4_voltages),
180 TWL_REGULATOR_ADJUSTABLE("vmmc1", 0, 0x27, twl4030_vmmc1_voltages),
181 TWL_REGULATOR_ADJUSTABLE("vmmc2", 0, 0x2B, twl4030_vmmc2_voltages),
182 TWL_REGULATOR_ADJUSTABLE("vpll1", 0, 0x2F, twl4030_vpll1_voltages),
183 TWL_REGULATOR_ADJUSTABLE("vpll2", 0, 0x33, twl4030_vpll2_voltages),
184 TWL_REGULATOR_ADJUSTABLE("vsim", 0, 0x37, twl4030_vsim_voltages),
185 TWL_REGULATOR_ADJUSTABLE("vdac", 0, 0x3B, twl4030_vdac_voltages),
186 TWL_REGULATOR_ADJUSTABLE("vintana2", 0, 0x43, twl4030_vintana2_voltages),
196 TWL_REGULATOR_ADJUSTABLE("vaux1", 0, 0x84, twl6030_voltages),
197 TWL_REGULATOR_ADJUSTABLE("vaux2", 0, 0x89, twl6030_voltages),
198 TWL_REGULATOR_ADJUSTABLE("vaux3", 0, 0x8C, twl6030_voltages),
199 TWL_REGULATOR_ADJUSTABLE("vmmc", 0, 0x98, twl6030_voltages),
200 TWL_REGULATOR_ADJUSTABLE("vpp", 0, 0x9C, twl6030_voltages),
201 TWL_REGULATOR_ADJUSTABLE("vusim", 0, 0xA4, twl6030_voltages),