Lines Matching refs:UL

45 #define		I2C_IE_XDR		(1UL << 14)   /* Transmit draining interrupt */
46 #define I2C_IE_RDR (1UL << 13) /* Receive draining interrupt */
47 #define I2C_IE_AAS (1UL << 9) /* Addressed as Slave interrupt */
48 #define I2C_IE_BF (1UL << 8) /* Bus Free interrupt */
49 #define I2C_IE_AERR (1UL << 7) /* Access Error interrupt */
50 #define I2C_IE_STC (1UL << 6) /* Start Condition interrupt */
51 #define I2C_IE_GC (1UL << 5) /* General Call interrupt */
52 #define I2C_IE_XRDY (1UL << 4) /* Transmit Data Ready interrupt */
53 #define I2C_IE_RRDY (1UL << 3) /* Receive Data Ready interrupt */
54 #define I2C_IE_ARDY (1UL << 2) /* Register Access Ready interrupt */
55 #define I2C_IE_NACK (1UL << 1) /* No Acknowledgment interrupt */
56 #define I2C_IE_AL (1UL << 0) /* Arbitration Lost interrupt */
58 #define I2C_STAT_XDR (1UL << 14)
59 #define I2C_STAT_RDR (1UL << 13)
60 #define I2C_STAT_BB (1UL << 12)
61 #define I2C_STAT_ROVR (1UL << 11)
62 #define I2C_STAT_XUDF (1UL << 10)
63 #define I2C_STAT_AAS (1UL << 9)
64 #define I2C_STAT_BF (1UL << 8)
65 #define I2C_STAT_AERR (1UL << 7)
66 #define I2C_STAT_STC (1UL << 6)
67 #define I2C_STAT_GC (1UL << 5)
68 #define I2C_STAT_XRDY (1UL << 4)
69 #define I2C_STAT_RRDY (1UL << 3)
70 #define I2C_STAT_ARDY (1UL << 2)
71 #define I2C_STAT_NACK (1UL << 1)
72 #define I2C_STAT_AL (1UL << 0)
74 #define I2C_SYSS_RDONE (1UL << 0)
76 #define I2C_BUF_RXFIFO_CLR (1UL << 14)
77 #define I2C_BUF_TXFIFO_CLR (1UL << 6)
83 #define I2C_CON_I2C_EN (1UL << 15)
84 #define I2C_CON_OPMODE_STD (0UL << 12)
85 #define I2C_CON_OPMODE_HS (1UL << 12)
86 #define I2C_CON_OPMODE_SCCB (2UL << 12)
87 #define I2C_CON_OPMODE_MASK (3UL << 13)
88 #define I2C_CON_I2C_STB (1UL << 11)
89 #define I2C_CON_MST (1UL << 10)
90 #define I2C_CON_TRX (1UL << 9)
91 #define I2C_CON_XSA (1UL << 8)
92 #define I2C_CON_XOA0 (1UL << 7)
93 #define I2C_CON_XOA1 (1UL << 6)
94 #define I2C_CON_XOA2 (1UL << 5)
95 #define I2C_CON_XOA3 (1UL << 4)
96 #define I2C_CON_STP (1UL << 1)
97 #define I2C_CON_STT (1UL << 0)
124 #define I2C_REG_SYSC_SRST (1UL << 1)
130 #define I2C_CLK 96000000UL /* 96MHz */
131 #define I2C_ICLK 12000000UL /* 12MHz */