Lines Matching refs:val
315 #define WR4(sc, offs, val) \
316 bus_write_4(sc->mem_res, offs, val)
319 reg_wait(struct usbphy_softc *sc, uint32_t reg, uint32_t mask, uint32_t val)
324 if ((RD4(sc, reg) & mask) == val)
334 uint32_t val;
337 val = RD4(sc, CTRL_USB_HOSTPC1_DEVLC);
339 val &= ~USB_HOSTPC1_DEVLC_PHCD;
341 val |= USB_HOSTPC1_DEVLC_PHCD;
342 WR4(sc, CTRL_USB_HOSTPC1_DEVLC, val);
357 uint32_t val;
360 val = RD4(sc, IF_USB_SUSP_CTRL);
361 val |= UTMIP_RESET;
362 WR4(sc, IF_USB_SUSP_CTRL, val);
365 val = RD4(sc, UTMIP_TX_CFG0);
366 val |= UTMIP_FS_PREAMBLE_J;
367 WR4(sc, UTMIP_TX_CFG0, val);
369 val = RD4(sc, UTMIP_HSRX_CFG0);
370 val &= ~UTMIP_IDLE_WAIT(~0);
371 val &= ~UTMIP_ELASTIC_LIMIT(~0);
372 val |= UTMIP_IDLE_WAIT(sc->idle_wait_delay);
373 val |= UTMIP_ELASTIC_LIMIT(sc->elastic_limit);
374 WR4(sc, UTMIP_HSRX_CFG0, val);
376 val = RD4(sc, UTMIP_HSRX_CFG1);
377 val &= ~UTMIP_HS_SYNC_START_DLY(~0);
378 val |= UTMIP_HS_SYNC_START_DLY(sc->hssync_start_delay);
379 WR4(sc, UTMIP_HSRX_CFG1, val);
381 val = RD4(sc, UTMIP_DEBOUNCE_CFG0);
382 val &= ~UTMIP_BIAS_DEBOUNCE_A(~0);
383 val |= UTMIP_BIAS_DEBOUNCE_A(0x7530); /* For 12MHz */
384 WR4(sc, UTMIP_DEBOUNCE_CFG0, val);
386 val = RD4(sc, UTMIP_MISC_CFG0);
387 val &= ~UTMIP_SUSPEND_EXIT_ON_EDGE;
388 WR4(sc, UTMIP_MISC_CFG0, val);
391 val = RD4(sc,IF_USB_SUSP_CTRL);
392 val &= ~USB_WAKE_ON_CNNT_EN_DEV;
393 val &= ~USB_WAKE_ON_DISCON_EN_DEV;
394 WR4(sc, IF_USB_SUSP_CTRL, val);
396 val = RD4(sc, UTMIP_BAT_CHRG_CFG0);
397 val &= ~UTMIP_PD_CHRG;
398 WR4(sc, UTMIP_BAT_CHRG_CFG0, val);
400 val = RD4(sc, UTMIP_BAT_CHRG_CFG0);
401 val |= UTMIP_PD_CHRG;
402 WR4(sc, UTMIP_BAT_CHRG_CFG0, val);
420 val = bus_read_4(sc->pads_res, UTMIP_BIAS_CFG0);
421 val &= ~UTMIP_OTGPD;
422 val &= ~UTMIP_BIASPD;
423 val &= ~UTMIP_HSSQUELCH_LEVEL(~0);
424 val &= ~UTMIP_HSDISCON_LEVEL(~0);
425 val &= ~UTMIP_HSDISCON_LEVEL_MSB(~0);
426 val |= UTMIP_HSSQUELCH_LEVEL(sc->hssquelch_level);
427 val |= UTMIP_HSDISCON_LEVEL(sc->hsdiscon_level);
428 val |= UTMIP_HSDISCON_LEVEL_MSB(sc->hsdiscon_level);
429 bus_write_4(sc->pads_res, UTMIP_BIAS_CFG0, val);
439 val = RD4(sc, UTMIP_XCVR_CFG0);
440 val &= ~UTMIP_FORCE_PD_POWERDOWN;
441 val &= ~UTMIP_FORCE_PD2_POWERDOWN ;
442 val &= ~UTMIP_FORCE_PDZI_POWERDOWN;
443 val &= ~UTMIP_XCVR_LSBIAS_SEL;
444 val &= ~UTMIP_XCVR_LSFSLEW(~0);
445 val &= ~UTMIP_XCVR_LSRSLEW(~0);
446 val &= ~UTMIP_XCVR_HSSLEW(~0);
447 val &= ~UTMIP_XCVR_HSSLEW_MSB(~0);
448 val |= UTMIP_XCVR_LSFSLEW(sc->xcvr_lsfslew);
449 val |= UTMIP_XCVR_LSRSLEW(sc->xcvr_lsrslew);
450 val |= UTMIP_XCVR_HSSLEW(sc->xcvr_hsslew);
451 val |= UTMIP_XCVR_HSSLEW_MSB(sc->xcvr_hsslew);
453 val &= ~UTMIP_XCVR_SETUP(~0);
454 val &= ~UTMIP_XCVR_SETUP_MSB(~0);
455 val |= UTMIP_XCVR_SETUP(sc->xcvr_setup);
456 val |= UTMIP_XCVR_SETUP_MSB(sc->xcvr_setup);
458 WR4(sc, UTMIP_XCVR_CFG0, val);
460 val = RD4(sc, UTMIP_XCVR_CFG1);
461 val &= ~UTMIP_FORCE_PDDISC_POWERDOWN;
462 val &= ~UTMIP_FORCE_PDCHRP_POWERDOWN;
463 val &= ~UTMIP_FORCE_PDDR_POWERDOWN;
464 val &= ~UTMIP_XCVR_TERM_RANGE_ADJ(~0);
465 val |= UTMIP_XCVR_TERM_RANGE_ADJ(sc->term_range_adj);
466 WR4(sc, UTMIP_XCVR_CFG1, val);
469 val = RD4(sc, UTMIP_BIAS_CFG1);
470 val &= ~UTMIP_BIAS_PDTRK_COUNT(~0);
471 val |= UTMIP_BIAS_PDTRK_COUNT(0x5);
472 WR4(sc, UTMIP_BIAS_CFG1, val);
474 val = RD4(sc, UTMIP_SPARE_CFG0);
476 val |= FUSE_SETUP_SEL;
478 val &= ~FUSE_SETUP_SEL;
479 WR4(sc, UTMIP_SPARE_CFG0, val);
481 val = RD4(sc, IF_USB_SUSP_CTRL);
482 val |= UTMIP_PHY_ENB;
483 WR4(sc, IF_USB_SUSP_CTRL, val);
485 val = RD4(sc, IF_USB_SUSP_CTRL);
486 val &= ~UTMIP_RESET;
487 WR4(sc, IF_USB_SUSP_CTRL, val);
491 val = RD4(sc, CTRL_USB_USBMODE);
492 val &= ~USB_USBMODE_MASK;
494 val |= USB_USBMODE_HOST;
496 val |= USB_USBMODE_DEVICE;
497 WR4(sc, CTRL_USB_USBMODE, val);
499 val = RD4(sc, CTRL_USB_HOSTPC1_DEVLC);
500 val &= ~USB_HOSTPC1_DEVLC_PTS(~0);
501 val |= USB_HOSTPC1_DEVLC_PTS(0);
502 WR4(sc, CTRL_USB_HOSTPC1_DEVLC, val);
511 uint32_t val;
516 val = RD4(sc, IF_USB_SUSP_CTRL);
517 val &= ~USB_WAKEUP_DEBOUNCE_COUNT(~0);
518 val |= USB_WAKE_ON_CNNT_EN_DEV;
519 val |= USB_WAKEUP_DEBOUNCE_COUNT(5);
520 WR4(sc, IF_USB_SUSP_CTRL, val);
523 val = RD4(sc, IF_USB_SUSP_CTRL);
524 val |= UTMIP_RESET;
525 WR4(sc, IF_USB_SUSP_CTRL, val);
527 val = RD4(sc, UTMIP_BAT_CHRG_CFG0);
528 val |= UTMIP_PD_CHRG;
529 WR4(sc, UTMIP_BAT_CHRG_CFG0, val);
531 val = RD4(sc, UTMIP_XCVR_CFG0);
532 val |= UTMIP_FORCE_PD_POWERDOWN;
533 val |= UTMIP_FORCE_PD2_POWERDOWN;
534 val |= UTMIP_FORCE_PDZI_POWERDOWN;
535 WR4(sc, UTMIP_XCVR_CFG0, val);
537 val = RD4(sc, UTMIP_XCVR_CFG1);
538 val |= UTMIP_FORCE_PDDISC_POWERDOWN;
539 val |= UTMIP_FORCE_PDCHRP_POWERDOWN;
540 val |= UTMIP_FORCE_PDDR_POWERDOWN;
541 WR4(sc, UTMIP_XCVR_CFG1, val);
551 val =bus_read_4(sc->pads_res, UTMIP_BIAS_CFG0);
552 val |= UTMIP_OTGPD;
553 val |= UTMIP_BIASPD;
554 bus_write_4(sc->pads_res, UTMIP_BIAS_CFG0, val);