Lines Matching refs:aml8726_wdt_soc_params
71 } aml8726_wdt_soc_params;
89 #define AML_WDT_CTRL_CPU_WDRESET_MASK aml8726_wdt_soc_params.ctrl_cpu_mask
92 #define AML_WDT_CTRL_EN aml8726_wdt_soc_params.ctrl_en
93 #define AML_WDT_CTRL_TERMINAL_CNT_MASK aml8726_wdt_soc_params.term_cnt_mask
96 #define AML_WDT_RESET_CNT_MASK aml8726_wdt_soc_params.reset_cnt_mask
197 aml8726_wdt_soc_params.ctrl_cpu_mask = 0xf <<
201 aml8726_wdt_soc_params.ctrl_en = 1 << 19;
202 aml8726_wdt_soc_params.term_cnt_mask = 0x07ffff <<
204 aml8726_wdt_soc_params.reset_cnt_mask = 0x07ffff <<
208 aml8726_wdt_soc_params.ctrl_en = 1 << 22;
209 aml8726_wdt_soc_params.term_cnt_mask = 0x3fffff <<
211 aml8726_wdt_soc_params.reset_cnt_mask = 0x3fffff <<
217 aml8726_wdt_soc_params.ctrl_cpu_mask = 0xf <<
219 aml8726_wdt_soc_params.ctrl_en = 1 << 19;
220 aml8726_wdt_soc_params.term_cnt_mask = 0x07ffff <<
222 aml8726_wdt_soc_params.reset_cnt_mask = 0x07ffff <<
226 aml8726_wdt_soc_params.ctrl_cpu_mask = 3 <<
228 aml8726_wdt_soc_params.ctrl_en = 1 << 22;
229 aml8726_wdt_soc_params.term_cnt_mask = 0x3fffff <<
231 aml8726_wdt_soc_params.reset_cnt_mask = 0x3fffff <<