Lines Matching refs:vm
76 struct vm *vm;
183 vioapic_deassert_irq(vhpet->vm, pin);
228 VM_CTR1(vhpet->vm, "hpet t%d intr is already asserted", n);
233 lapic_intr_msi(vhpet->vm, vhpet->timer[n].msireg >> 32,
240 VM_CTR1(vhpet->vm, "hpet t%d intr is not routed to ioapic", n);
245 vioapic_pulse_irq(vhpet->vm, pin);
248 vioapic_assert_irq(vhpet->vm, pin);
293 VM_CTR1(vhpet->vm, "hpet t%d fired", n);
320 VM_CTR1(vhpet->vm, "hpet t%d stopped", n);
331 VM_CTR1(vhpet->vm, "hpet t%d interrupt triggered after "
420 VM_CTR2(vhpet->vm, "hpet t%d cap_config set to 0x%016x", n, newval);
430 VM_CTR3(vhpet->vm, "hpet t%d configured invalid irq %d, "
463 VM_CTR1(vhpet->vm, "hpet t%d isr cleared due to "
465 vioapic_deassert_irq(vhpet->vm, old_pin);
472 vhpet_mmio_write(void *vm, int vcpuid, uint64_t gpa, uint64_t val, int size,
481 vhpet = vm_hpet(vm);
501 VM_CTR2(vhpet->vm, "hpet invalid mmio write: "
508 VM_CTR2(vhpet->vm, "hpet invalid mmio write: "
534 VM_CTR0(vhpet->vm, "hpet enabled");
537 VM_CTR0(vhpet->vm, "hpet disabled");
547 VM_CTR1(vhpet->vm, "hpet t%d isr cleared", i);
622 vhpet_mmio_read(void *vm, int vcpuid, uint64_t gpa, uint64_t *rval, int size,
629 vhpet = vm_hpet(vm);
636 VM_CTR2(vhpet->vm, "hpet invalid mmio read: "
644 VM_CTR2(vhpet->vm, "hpet invalid mmio read: "
704 vhpet_init(struct vm *vm)
713 vhpet->vm = vm;
719 pincount = vioapic_pincount(vm);