Lines Matching refs:aSigExtra
585 bits32 aSig, aSigExtra;
608 aSigExtra = aExp | aSig;
613 aSigExtra = aSig<<( shiftCount & 31 );
616 if ( aSigExtra ) float_exception_flags |= float_flag_inexact;
619 if ( (sbits32) aSigExtra < 0 ) {
621 if ( (bits32) ( aSigExtra<<1 ) == 0 ) z &= ~1;
626 aSigExtra = ( aSigExtra != 0 );
628 z += ( roundingMode == float_round_down ) & aSigExtra;
632 z += ( roundingMode == float_round_up ) & aSigExtra;
1411 bits32 aSig0, aSig1, absZ, aSigExtra;
1426 aSig0 | 0x00100000, aSig1, shiftCount, &absZ, &aSigExtra );
1432 aSigExtra = aExp | aSig0 | aSig1;
1437 aSigExtra = ( aSig0<<( shiftCount & 31 ) ) | aSig1;
1443 if ( (sbits32) aSigExtra < 0 ) {
1445 if ( (bits32) ( aSigExtra<<1 ) == 0 ) absZ &= ~1;
1450 aSigExtra = ( aSigExtra != 0 );
1453 + ( ( roundingMode == float_round_down ) & aSigExtra ) );
1456 z = absZ + ( ( roundingMode == float_round_up ) & aSigExtra );
1464 if ( aSigExtra ) float_exception_flags |= float_flag_inexact;
1485 bits32 aSig0, aSig1, absZ, aSigExtra;
1499 aSig0 | 0x00100000, aSig1, shiftCount, &absZ, &aSigExtra );
1509 aSigExtra = ( aSig0<<( shiftCount & 31 ) ) | aSig1;
1518 if ( aSigExtra ) float_exception_flags |= float_flag_inexact;