Lines Matching refs:H2
449 my ($D0,$D1,$D2,$D3,$D4, $H0,$H1,$H2,$H3,$H4) = map("q$_",(5..14));
536 @ H0>>+H1>>+H2>>+H3>>+H4
550 @ H0, H2, H3 are guaranteed to be 26 bits wide, while H1 and H4
557 @ H4 = H4*R0 + H3*R1 + H2*R2 + H1*R3 + H0 * R4,
575 @ one has to watch for H2 (which is narrower than H0) and 5*H4
752 vld4.32 {$H0#lo[0],$H1#lo[0],$H2#lo[0],$H3#lo[0]},[$inp]!
761 vrev32.8 $H2,$H2
766 vsri.u32 $H3#lo,$H2#lo,#14
767 vshl.u32 $H2#lo,$H2#lo,#12
771 vsri.u32 $H2#lo,$H1#lo,#20
774 vbic.i32 $H2#lo,#0xfc000000
780 vadd.i32 $H2#hi,$H2#lo,$D2#lo
798 vld4.32 {$H0#lo,$H1#lo,$H2#lo,$H3#lo},[$inp] @ inp[0:1]
800 vld4.32 {$H0#hi,$H1#hi,$H2#hi,$H3#hi},[$in2] @ inp[2:3] (or 0)
810 vrev32.8 $H2,$H2
815 vsri.u32 $H3,$H2,#14
816 vshl.u32 $H2,$H2,#12
819 vsri.u32 $H2,$H1,#20
822 vbic.i32 $H2,#0xfc000000
858 vadd.i32 $H2#lo,$H2#lo,$D2#lo @ accumulate inp[0:1]
859 vmull.u32 $D2,$H2#hi,${R0}[1]
874 vmlal.u32 $D3,$H2#hi,${R1}[1]
881 vmlal.u32 $D4,$H2#hi,${R2}[1]
886 vmlal.u32 $D0,$H2#hi,${S3}[1]
894 vmlal.u32 $D1,$H2#hi,${S4}[1]
897 vld4.32 {$H0#hi,$H1#hi,$H2#hi,$H3#hi},[$in2] @ inp[2:3] (or 0)
907 vmlal.u32 $D2,$H2#lo,${R0}[0]
910 vmlal.u32 $D3,$H2#lo,${R1}[0]
918 vmlal.u32 $D4,$H2#lo,${R2}[0]
923 vmlal.u32 $D0,$H2#lo,${S3}[0]
932 vmlal.u32 $D1,$H2#lo,${S4}[0]
935 vld4.32 {$H0#lo,$H1#lo,$H2#lo,$H3#lo},[$inp] @ inp[0:1]
940 vrev32.8 $H2,$H2
964 vsri.u32 $H3,$H2,#14
966 vshl.u32 $H2,$H2,#12
975 vsri.u32 $H2,$H1,#20
979 vbic.i32 $H2,#0xfc000000
1005 vadd.i32 $H2#hi,$H2#lo,$D2#lo @ add hash value and move to #hi
1015 vadd.i32 $H2#lo,$H2#lo,$D2#lo @ can be redundant
1016 vmull.u32 $D2,$H2#hi,$R0
1028 vmlal.u32 $D3,$H2#hi,$R1
1038 vmlal.u32 $D4,$H2#hi,$R2
1045 vmlal.u32 $D0,$H2#hi,$S3
1057 vmlal.u32 $D1,$H2#hi,$S4
1068 vmlal.u32 $D2,$H2#lo,$R0
1076 vmlal.u32 $D3,$H2#lo,$R1
1086 vmlal.u32 $D4,$H2#lo,$R2
1091 vmlal.u32 $D0,$H2#lo,$S3
1101 vmlal.u32 $D1,$H2#lo,$S4