Lines Matching refs:context
124 struct mlx4_context *context = to_mctx(ibv_ctx);
138 context->hca_core_clock = hca_clock_page +
139 (context->core_clock.offset & (mdev->page_size - 1));
146 struct mlx4_context *context;
159 context = to_mctx(ibv_ctx);
167 context->num_qps = resp_v3.qp_tab_size;
169 context->cqe_size = sizeof (struct mlx4_cqe);
175 context->num_qps = resp.qp_tab_size;
178 context->cqe_size = resp.cqe_size;
180 context->cqe_size = sizeof (struct mlx4_cqe);
183 context->qp_table_shift = ffs(context->num_qps) - 1 - MLX4_QP_TABLE_BITS;
184 context->qp_table_mask = (1 << context->qp_table_shift) - 1;
186 context->port_query_cache[i].valid = 0;
188 pthread_mutex_init(&context->qp_table_mutex, NULL);
190 context->qp_table[i].refcnt = 0;
193 context->db_list[i] = NULL;
195 mlx4_init_xsrq_table(&context->xsrq_table, context->num_qps);
196 pthread_mutex_init(&context->db_list_mutex, NULL);
198 context->uar = mmap(NULL, dev->page_size, PROT_WRITE,
200 if (context->uar == MAP_FAILED)
204 context->bf_page = mmap(NULL, dev->page_size,
207 if (context->bf_page == MAP_FAILED) {
210 context->bf_page = NULL;
211 context->bf_buf_size = 0;
213 context->bf_buf_size = bf_reg_size / 2;
214 context->bf_offset = 0;
215 pthread_spin_init(&context->bf_lock, PTHREAD_PROCESS_PRIVATE);
218 context->bf_page = NULL;
219 context->bf_buf_size = 0;
222 pthread_spin_init(&context->uar_lock, PTHREAD_PROCESS_PRIVATE);
225 context->hca_core_clock = NULL;
229 context->max_qp_wr = dev_attrs.orig_attr.max_qp_wr;
230 context->max_sge = dev_attrs.orig_attr.max_sge;
231 if (context->core_clock.offset_valid)
256 struct mlx4_context *context = to_mctx(ibv_ctx);
258 munmap(context->uar, to_mdev(&v_device->device)->page_size);
259 if (context->bf_page)
260 munmap(context->bf_page, to_mdev(&v_device->device)->page_size);
261 if (context->hca_core_clock)
262 munmap(context->hca_core_clock - context->core_clock.offset,