Lines Matching refs:sq
323 PDBG("%s sqid 0x%x sq key %" PRIx64 " sq db/gts key %" PRIx64
332 qhp->wq.sq.qid = resp.sqid;
333 qhp->wq.sq.size = resp.sq_size;
334 qhp->wq.sq.memsize = resp.sq_memsize;
335 qhp->wq.sq.flags = 0;
347 qhp->wq.sq.udb = dbva;
348 qhp->wq.sq.queue = mmap(NULL, qhp->wq.sq.memsize,
351 if (qhp->wq.sq.queue == MAP_FAILED)
365 qhp->wq.sq.sw_sq = calloc(qhp->wq.sq.size, sizeof (struct t4_swsqe));
366 if (!qhp->wq.sq.sw_sq)
373 PDBG("%s sq dbva %p sq qva %p sq depth %u sq memsize %lu "
376 qhp->wq.sq.udb, qhp->wq.sq.queue,
377 qhp->wq.sq.size, qhp->wq.sq.memsize,
384 dev->qpid2ptr[qhp->wq.sq.qid] = qhp;
389 free(qhp->wq.sq.sw_sq);
395 munmap((void *)qhp->wq.sq.queue, qhp->wq.sq.memsize);
397 munmap(MASKED(qhp->wq.sq.udb), c4iw_page_size);
427 PDBG("%s sqid 0x%x sq key %" PRIx64 " sq db/gts key %" PRIx64
436 qhp->wq.sq.qid = resp.sqid;
437 qhp->wq.sq.size = resp.sq_size;
438 qhp->wq.sq.memsize = resp.sq_memsize;
439 qhp->wq.sq.flags = resp.flags & C4IW_QPF_ONCHIP ? T4_SQ_ONCHIP : 0;
440 qhp->wq.sq.flush_cidx = -1;
446 sizeof *qhp->wq.sq.queue + 16*sizeof(__be64) ) {
457 qhp->wq.sq.udb = dbva;
459 unsigned long segment_offset = 128 * (qhp->wq.sq.qid &
463 qhp->wq.sq.udb += segment_offset / 4;
464 qhp->wq.sq.wc_reg_available = 1;
466 qhp->wq.sq.bar2_qid = qhp->wq.sq.qid & qhp->wq.qid_mask;
467 qhp->wq.sq.udb += 2;
470 qhp->wq.sq.queue = mmap(NULL, qhp->wq.sq.memsize,
473 if (qhp->wq.sq.queue == MAP_FAILED)
498 qhp->wq.sq.sw_sq = calloc(qhp->wq.sq.size, sizeof (struct t4_swsqe));
499 if (!qhp->wq.sq.sw_sq)
507 qhp->wq.sq.ma_sync = mmap(NULL, c4iw_page_size, PROT_WRITE,
510 if (qhp->wq.sq.ma_sync == MAP_FAILED)
512 qhp->wq.sq.ma_sync += (A_PCIE_MA_SYNC & (c4iw_page_size - 1));
522 PDBG("%s sq dbva %p sq qva %p sq depth %u sq memsize %lu "
525 qhp->wq.sq.udb, qhp->wq.sq.queue,
526 qhp->wq.sq.size, qhp->wq.sq.memsize,
533 dev->qpid2ptr[qhp->wq.sq.qid] = qhp;
540 free(qhp->wq.sq.sw_sq);
546 munmap((void *)qhp->wq.sq.queue, qhp->wq.sq.memsize);
548 munmap(MASKED(qhp->wq.sq.udb), c4iw_page_size);
570 qhp->wq.sq.cidx = 0;
571 qhp->wq.sq.wq_pidx = qhp->wq.sq.pidx = qhp->wq.sq.in_use = 0;
573 qhp->wq.sq.oldest_read = NULL;
574 memset(qhp->wq.sq.queue, 0, qhp->wq.sq.memsize);
614 qhp->wq.sq.ma_sync -= (A_PCIE_MA_SYNC & (c4iw_page_size - 1));
615 munmap((void *)qhp->wq.sq.ma_sync, c4iw_page_size);
617 munmap(MASKED(qhp->wq.sq.udb), c4iw_page_size);
619 munmap(qhp->wq.sq.queue, qhp->wq.sq.memsize);
623 dev->qpid2ptr[qhp->wq.sq.qid] = NULL;
627 free(qhp->wq.sq.sw_sq);