• Home
  • History
  • Annotate
  • Raw
  • Download
  • only in /freebsd-12-stable/contrib/llvm-project/llvm/utils/TableGen/

Lines Matching defs:ProcIndices

871   SchedClasses.back().ProcIndices.push_back(0);
882 unsigned SCIdx = addSchedClass(ItinDef, Writes, Reads, /*ProcIndices*/{0});
913 if (SC.ProcIndices[0] != 0)
917 IdxVec ProcIndices;
919 ProcIndices.push_back(0);
924 ProcIndices.push_back(0);
939 ProcIndices.push_back(ProcModel.Index);
954 // If ProcIndices contains zero, the class applies to all processors.
956 if (!std::count(ProcIndices.begin(), ProcIndices.end(), 0)) {
958 if (!std::count(ProcIndices.begin(), ProcIndices.end(), PM.Index))
1005 /// SchedWrites and SchedReads. ProcIndices contains the set of IDs of
1010 ArrayRef<unsigned> ProcIndices) {
1011 assert(!ProcIndices.empty() && "expect at least one ProcIdx");
1021 std::set_union(SchedClasses[Idx].ProcIndices.begin(),
1022 SchedClasses[Idx].ProcIndices.end(),
1023 ProcIndices.begin(), ProcIndices.end(),
1025 SchedClasses[Idx].ProcIndices = std::move(PI);
1036 SC.ProcIndices = ProcIndices;
1077 assert(SchedClasses[OldSCIdx].ProcIndices[0] == 0 &&
1115 SC.ProcIndices.push_back(0);
1239 Idx, SchedClasses[Idx].ProcIndices);
1320 SmallVector<unsigned, 4> ProcIndices;
1466 SmallVectorImpl<unsigned> &ProcIndices = TransVec[TransIdx].ProcIndices;
1467 if (ProcIndices[0] && Variant.ProcIdx) {
1468 unsigned Cnt = std::count(ProcIndices.begin(), ProcIndices.end(),
1513 Trans.ProcIndices.assign(1, VInfo.ProcIdx);
1620 TransVec.back().ProcIndices = Trans.ProcIndices;
1667 OperReadsVariant, I->ProcIndices);
1668 SCTrans.ProcIndices.assign(I->ProcIndices.begin(), I->ProcIndices.end());
1688 ArrayRef<unsigned> ProcIndices) {
1689 LLVM_DEBUG(dbgs() << "INFER RW proc("; dumpIdxVec(ProcIndices);
1696 LastTransitions.back().ProcIndices.append(ProcIndices.begin(),
1697 ProcIndices.end());
1732 // OperWrites, OperReads, or ProcIndices after calling inferFromTransitions.
1832 // with processor resources. Refer to the parent SchedClass's ProcIndices to
1851 collectRWResources(SC.Writes, SC.Reads, SC.ProcIndices);
2010 ArrayRef<unsigned> ProcIndices) {
2014 for (unsigned Idx : ProcIndices)
2018 for (unsigned Idx : ProcIndices)
2030 AliasProcIndices = ProcIndices;
2046 ArrayRef<unsigned> ProcIndices) {
2048 collectRWResources(Idx, /*IsRead=*/false, ProcIndices);
2051 collectRWResources(Idx, /*IsRead=*/true, ProcIndices);
2196 dbgs() << "\n ProcIdx: "; dumpIdxVec(ProcIndices); dbgs() << '\n';
2200 dumpIdxVec(Transition.ProcIndices);