Lines Matching refs:FMA
629 // We don't support FMA.
630 setOperationAction(ISD::FMA, MVT::f64, Expand);
631 setOperationAction(ISD::FMA, MVT::f32, Expand);
663 setOperationAction(ISD::FMA, MVT::f80, Expand);
696 setOperationAction(ISD::FMA, MVT::f128, LibCall);
782 setOperationAction(ISD::FMA, VT, Expand);
1261 setOperationAction(ISD::FMA, VT, Legal);
1462 setOperationAction(ISD::FMA, VT, Legal);
2002 setTargetDAGCombine(ISD::FMA);
20947 // rsqrt estimate with refinement on x86 prior to FMA requires at least 16
20950 // along with FMA, this could be a throughput win.
20978 // reciprocal estimate with refinement on x86 prior to FMA requires
20981 // along with FMA, this could be a throughput win.
35028 if (FMAdd.getOpcode() != ISD::FMA || FMSub.getOpcode() != X86ISD::FMSUB ||
37245 case ISD::FMA: // Begin 3 operands
42543 case ISD::FMA: Opcode = X86ISD::FNMADD; break;
42547 case X86ISD::FNMADD: Opcode = ISD::FMA; break;
42557 case ISD::FMA: Opcode = X86ISD::FMSUB; break;
42559 case X86ISD::FMSUB: Opcode = ISD::FMA; break;
42575 case ISD::FMA: Opcode = X86ISD::FNMSUB; break;
42581 case X86ISD::FNMSUB: Opcode = ISD::FMA; break;
42605 // If we're negating a FMUL node on a target with FMA, then we can avoid the
42616 // If we're negating an FMA node, then we can adjust the
42620 case ISD::FMA:
42655 case ISD::FMA:
42695 case ISD::FMA:
46105 case ISD::FMA: return combineFMA(N, DAG, DCI, Subtarget);