Lines Matching refs:SystemZ
1 //===-- SystemZInstrInfo.cpp - SystemZ instruction information ------------===//
9 // This file contains the SystemZ implementation of the TargetInstrInfo class.
15 #include "SystemZ.h"
59 : SystemZGenInstrInfo(SystemZ::ADJCALLSTACKDOWN, SystemZ::ADJCALLSTACKUP),
81 HighRegOp.setReg(RI.getSubReg(HighRegOp.getReg(), SystemZ::subreg_h64));
82 LowRegOp.setReg(RI.getSubReg(LowRegOp.getReg(), SystemZ::subreg_l64));
125 unsigned NewOpcode = getOpcodeForOffset(SystemZ::LA, Offset);
141 bool IsHigh = SystemZ::isHighReg(Reg);
156 bool DestIsHigh = SystemZ::isHighReg(DestReg);
157 bool SrcIsHigh = SystemZ::isHighReg(SrcReg);
163 SystemZ::LR, 32, MI.getOperand(1).isKill(),
179 SystemZ::isHighReg(Reg) ? HighOpcode : LowOpcode,
190 unsigned Opcode = SystemZ::isHighReg(Reg) ? HighOpcode : LowOpcode;
215 const Register Reg32 = RI.getSubReg(Reg64, SystemZ::subreg_l32);
221 BuildMI(*MBB, MI, MI->getDebugLoc(), get(SystemZ::EAR), Reg32)
222 .addReg(SystemZ::A0)
226 BuildMI(*MBB, MI, MI->getDebugLoc(), get(SystemZ::SLLG), Reg64)
232 BuildMI(*MBB, MI, MI->getDebugLoc(), get(SystemZ::EAR), Reg32)
233 .addReg(SystemZ::A1);
236 MI->setDesc(get(SystemZ::LG));
253 bool DestIsHigh = SystemZ::isHighReg(DestReg);
254 bool SrcIsHigh = SystemZ::isHighReg(SrcReg);
256 Opcode = SystemZ::RISBHH;
258 Opcode = SystemZ::RISBHL;
260 Opcode = SystemZ::RISBLH;
283 case SystemZ::SELRMux:
284 case SystemZ::SELFHR:
285 case SystemZ::SELR:
286 case SystemZ::SELGR:
287 case SystemZ::LOCRMux:
288 case SystemZ::LOCFHR:
289 case SystemZ::LOCR:
290 case SystemZ::LOCGR: {
335 if (MI.getOpcode() != SystemZ::MVC || !MI.getOperand(0).isFI() ||
387 if (Branch.CCMask == SystemZ::CCMASK_ANY) {
490 "SystemZ branch conditions have one component!");
496 BuildMI(&MBB, DL, get(SystemZ::J)).addMBB(TBB);
504 BuildMI(&MBB, DL, get(SystemZ::BRC))
510 BuildMI(&MBB, DL, get(SystemZ::J)).addMBB(FBB);
553 SystemZ::GRX32BitRegClass.hasSubClassEq(RC)) ||
554 SystemZ::GR32BitRegClass.hasSubClassEq(RC) ||
555 SystemZ::GR64BitRegClass.hasSubClassEq(RC)) {
580 if (SystemZ::GRX32BitRegClass.hasSubClassEq(RC)) {
582 Opc = SystemZ::SELRMux;
584 Opc = SystemZ::LOCRMux;
586 Opc = SystemZ::LOCR;
587 MRI.constrainRegClass(DstReg, &SystemZ::GR32BitRegClass);
588 Register TReg = MRI.createVirtualRegister(&SystemZ::GR32BitRegClass);
589 Register FReg = MRI.createVirtualRegister(&SystemZ::GR32BitRegClass);
595 } else if (SystemZ::GR64BitRegClass.hasSubClassEq(RC)) {
597 Opc = SystemZ::SELGR;
599 Opc = SystemZ::LOCGR;
612 if (DefOpc != SystemZ::LHIMux && DefOpc != SystemZ::LHI &&
613 DefOpc != SystemZ::LGHI)
625 case SystemZ::SELRMux:
628 case SystemZ::LOCRMux:
631 NewUseOpc = SystemZ::LOCHIMux;
639 case SystemZ::SELGR:
642 case SystemZ::LOCGR:
645 NewUseOpc = SystemZ::LOCGHI;
674 if (Opcode == SystemZ::Return ||
675 Opcode == SystemZ::Trap ||
676 Opcode == SystemZ::CallJG ||
677 Opcode == SystemZ::CallBR)
694 if (MBB.getLastNonDebugInstr()->getOpcode() != SystemZ::Trap &&
725 if (Opcode == SystemZ::Trap) {
726 MI.setDesc(get(SystemZ::CondTrap));
729 .addReg(SystemZ::CC, RegState::Implicit);
732 if (Opcode == SystemZ::Return) {
733 MI.setDesc(get(SystemZ::CondReturn));
736 .addReg(SystemZ::CC, RegState::Implicit);
739 if (Opcode == SystemZ::CallJG) {
744 MI.setDesc(get(SystemZ::CallBRCL));
750 .addReg(SystemZ::CC, RegState::Implicit);
753 if (Opcode == SystemZ::CallBR) {
756 MI.setDesc(get(SystemZ::CallBCR));
760 .addReg(SystemZ::CC, RegState::Implicit);
773 if (SystemZ::GR128BitRegClass.contains(DestReg, SrcReg)) {
774 copyPhysReg(MBB, MBBI, DL, RI.getSubReg(DestReg, SystemZ::subreg_h64),
775 RI.getSubReg(SrcReg, SystemZ::subreg_h64), KillSrc);
778 copyPhysReg(MBB, MBBI, DL, RI.getSubReg(DestReg, SystemZ::subreg_l64),
779 RI.getSubReg(SrcReg, SystemZ::subreg_l64), KillSrc);
785 if (SystemZ::GRX32BitRegClass.contains(DestReg, SrcReg)) {
786 emitGRX32Move(MBB, MBBI, DL, DestReg, SrcReg, SystemZ::LR, 32, KillSrc,
792 if (SystemZ::VR128BitRegClass.contains(DestReg) &&
793 SystemZ::FP128BitRegClass.contains(SrcReg)) {
795 RI.getMatchingSuperReg(RI.getSubReg(SrcReg, SystemZ::subreg_h64),
796 SystemZ::subreg_h64, &SystemZ::VR128BitRegClass);
798 RI.getMatchingSuperReg(RI.getSubReg(SrcReg, SystemZ::subreg_l64),
799 SystemZ::subreg_h64, &SystemZ::VR128BitRegClass);
801 BuildMI(MBB, MBBI, DL, get(SystemZ::VMRHG), DestReg)
806 if (SystemZ::FP128BitRegClass.contains(DestReg) &&
807 SystemZ::VR128BitRegClass.contains(SrcReg)) {
809 RI.getMatchingSuperReg(RI.getSubReg(DestReg, SystemZ::subreg_h64),
810 SystemZ::subreg_h64, &SystemZ::VR128BitRegClass);
812 RI.getMatchingSuperReg(RI.getSubReg(DestReg, SystemZ::subreg_l64),
813 SystemZ::subreg_h64, &SystemZ::VR128BitRegClass);
817 BuildMI(MBB, MBBI, DL, get(SystemZ::VREPG), DestRegLo)
823 if (SrcReg == SystemZ::CC) {
824 auto MIB = BuildMI(MBB, MBBI, DL, get(SystemZ::IPM), DestReg);
832 if (DestReg == SystemZ::CC) {
833 BuildMI(MBB, MBBI, DL, get(SystemZ::TMLH))
835 .addImm(3 << (SystemZ::IPM_CC - 16));
841 if (SystemZ::GR64BitRegClass.contains(DestReg, SrcReg))
842 Opcode = SystemZ::LGR;
843 else if (SystemZ::FP32BitRegClass.contains(DestReg, SrcReg))
845 Opcode = STI.hasVector() ? SystemZ::LDR32 : SystemZ::LER;
846 else if (SystemZ::FP64BitRegClass.contains(DestReg, SrcReg))
847 Opcode = SystemZ::LDR;
848 else if (SystemZ::FP128BitRegClass.contains(DestReg, SrcReg))
849 Opcode = SystemZ::LXR;
850 else if (SystemZ::VR32BitRegClass.contains(DestReg, SrcReg))
851 Opcode = SystemZ::VLR32;
852 else if (SystemZ::VR64BitRegClass.contains(DestReg, SrcReg))
853 Opcode = SystemZ::VLR64;
854 else if (SystemZ::VR128BitRegClass.contains(DestReg, SrcReg))
855 Opcode = SystemZ::VLR;
856 else if (SystemZ::AR32BitRegClass.contains(DestReg, SrcReg))
857 Opcode = SystemZ::CPYA;
858 else if (SystemZ::AR32BitRegClass.contains(DestReg) &&
859 SystemZ::GR32BitRegClass.contains(SrcReg))
860 Opcode = SystemZ::SAR;
861 else if (SystemZ::GR32BitRegClass.contains(DestReg) &&
862 SystemZ::AR32BitRegClass.contains(SrcReg))
863 Opcode = SystemZ::EAR;
927 case SystemZ::NILMux: return LogicOp(32, 0, 16);
928 case SystemZ::NIHMux: return LogicOp(32, 16, 16);
929 case SystemZ::NILL64: return LogicOp(64, 0, 16);
930 case SystemZ::NILH64: return LogicOp(64, 16, 16);
931 case SystemZ::NIHL64: return LogicOp(64, 32, 16);
932 case SystemZ::NIHH64: return LogicOp(64, 48, 16);
933 case SystemZ::NIFMux: return LogicOp(32, 0, 32);
934 case SystemZ::NILF64: return LogicOp(64, 0, 32);
935 case SystemZ::NIHF64: return LogicOp(64, 32, 32);
941 if (OldMI->registerDefIsDead(SystemZ::CC)) {
942 MachineOperand *CCDef = NewMI->findRegisterDefOperand(SystemZ::CC);
968 NewOpcode = SystemZ::RISBG;
971 NewOpcode = SystemZ::RISBGN;
973 NewOpcode = SystemZ::RISBMux;
1013 if (LIS != nullptr && (Opcode == SystemZ::LA || Opcode == SystemZ::LAY) &&
1018 MCRegUnitIterator CCUnit(SystemZ::CC, TRI);
1027 MI.getDebugLoc(), get(SystemZ::AGSI))
1031 BuiltMI->findRegisterDefOperand(SystemZ::CC)->setIsDead(true);
1049 if ((Opcode == SystemZ::AHI || Opcode == SystemZ::AGHI) && OpNum == 0 &&
1052 Opcode = (Opcode == SystemZ::AHI ? SystemZ::ASI : SystemZ::AGSI);
1063 if ((Opcode == SystemZ::ALFI && OpNum == 0 &&
1065 (Opcode == SystemZ::ALGFI && OpNum == 0 &&
1068 Opcode = (Opcode == SystemZ::ALFI ? SystemZ::ALSI : SystemZ::ALGSI);
1078 if ((Opcode == SystemZ::SLFI && OpNum == 0 &&
1080 (Opcode == SystemZ::SLGFI && OpNum == 0 &&
1083 Opcode = (Opcode == SystemZ::SLFI ? SystemZ::ALSI : SystemZ::ALGSI);
1093 if (Opcode == SystemZ::LGDR || Opcode == SystemZ::LDGR) {
1094 bool Op0IsGPR = (Opcode == SystemZ::LGDR);
1095 bool Op1IsGPR = (Opcode == SystemZ::LDGR);
1099 unsigned StoreOpcode = Op1IsGPR ? SystemZ::STG : SystemZ::STD;
1110 unsigned LoadOpcode = Op0IsGPR ? SystemZ::LG : SystemZ::LD;
1139 get(SystemZ::MVC))
1150 get(SystemZ::MVC))
1164 int MemOpcode = SystemZ::getMemOpcode(Opcode);
1170 if (SystemZ::getTwoOperandOpcode(Opcode) != -1 && MemOpcode != -1) {
1182 if (DstPhys && !SystemZ::GRH32BitRegClass.contains(DstPhys) && SrcReg &&
1227 case SystemZ::L128:
1228 splitMove(MI, SystemZ::LG);
1231 case SystemZ::ST128:
1232 splitMove(MI, SystemZ::STG);
1235 case SystemZ::LX:
1236 splitMove(MI, SystemZ::LD);
1239 case SystemZ::STX:
1240 splitMove(MI, SystemZ::STD);
1243 case SystemZ::LBMux:
1244 expandRXYPseudo(MI, SystemZ::LB, SystemZ::LBH);
1247 case SystemZ::LHMux:
1248 expandRXYPseudo(MI, SystemZ::LH, SystemZ::LHH);
1251 case SystemZ::LLCRMux:
1252 expandZExtPseudo(MI, SystemZ::LLCR, 8);
1255 case SystemZ::LLHRMux:
1256 expandZExtPseudo(MI, SystemZ::LLHR, 16);
1259 case SystemZ::LLCMux:
1260 expandRXYPseudo(MI, SystemZ::LLC, SystemZ::LLCH);
1263 case SystemZ::LLHMux:
1264 expandRXYPseudo(MI, SystemZ::LLH, SystemZ::LLHH);
1267 case SystemZ::LMux:
1268 expandRXYPseudo(MI, SystemZ::L, SystemZ::LFH);
1271 case SystemZ::LOCMux:
1272 expandLOCPseudo(MI, SystemZ::LOC, SystemZ::LOCFH);
1275 case SystemZ::LOCHIMux:
1276 expandLOCPseudo(MI, SystemZ::LOCHI, SystemZ::LOCHHI);
1279 case SystemZ::STCMux:
1280 expandRXYPseudo(MI, SystemZ::STC, SystemZ::STCH);
1283 case SystemZ::STHMux:
1284 expandRXYPseudo(MI, SystemZ::STH, SystemZ::STHH);
1287 case SystemZ::STMux:
1288 expandRXYPseudo(MI, SystemZ::ST, SystemZ::STFH);
1291 case SystemZ::STOCMux:
1292 expandLOCPseudo(MI, SystemZ::STOC, SystemZ::STOCFH);
1295 case SystemZ::LHIMux:
1296 expandRIPseudo(MI, SystemZ::LHI, SystemZ::IIHF, true);
1299 case SystemZ::IIFMux:
1300 expandRIPseudo(MI, SystemZ::IILF, SystemZ::IIHF, false);
1303 case SystemZ::IILMux:
1304 expandRIPseudo(MI, SystemZ::IILL, SystemZ::IIHL, false);
1307 case SystemZ::IIHMux:
1308 expandRIPseudo(MI, SystemZ::IILH, SystemZ::IIHH, false);
1311 case SystemZ::NIFMux:
1312 expandRIPseudo(MI, SystemZ::NILF, SystemZ::NIHF, false);
1315 case SystemZ::NILMux:
1316 expandRIPseudo(MI, SystemZ::NILL, SystemZ::NIHL, false);
1319 case SystemZ::NIHMux:
1320 expandRIPseudo(MI, SystemZ::NILH, SystemZ::NIHH, false);
1323 case SystemZ::OIFMux:
1324 expandRIPseudo(MI, SystemZ::OILF, SystemZ::OIHF, false);
1327 case SystemZ::OILMux:
1328 expandRIPseudo(MI, SystemZ::OILL, SystemZ::OIHL, false);
1331 case SystemZ::OIHMux:
1332 expandRIPseudo(MI, SystemZ::OILH, SystemZ::OIHH, false);
1335 case SystemZ::XIFMux:
1336 expandRIPseudo(MI, SystemZ::XILF, SystemZ::XIHF, false);
1339 case SystemZ::TMLMux:
1340 expandRIPseudo(MI, SystemZ::TMLL, SystemZ::TMHL, false);
1343 case SystemZ::TMHMux:
1344 expandRIPseudo(MI, SystemZ::TMLH, SystemZ::TMHH, false);
1347 case SystemZ::AHIMux:
1348 expandRIPseudo(MI, SystemZ::AHI, SystemZ::AIH, false);
1351 case SystemZ::AHIMuxK:
1352 expandRIEPseudo(MI, SystemZ::AHI, SystemZ::AHIK, SystemZ::AIH);
1355 case SystemZ::AFIMux:
1356 expandRIPseudo(MI, SystemZ::AFI, SystemZ::AIH, false);
1359 case SystemZ::CHIMux:
1360 expandRIPseudo(MI, SystemZ::CHI, SystemZ::CIH, false);
1363 case SystemZ::CFIMux:
1364 expandRIPseudo(MI, SystemZ::CFI, SystemZ::CIH, false);
1367 case SystemZ::CLFIMux:
1368 expandRIPseudo(MI, SystemZ::CLFI, SystemZ::CLIH, false);
1371 case SystemZ::CMux:
1372 expandRXYPseudo(MI, SystemZ::C, SystemZ::CHF);
1375 case SystemZ::CLMux:
1376 expandRXYPseudo(MI, SystemZ::CL, SystemZ::CLHF);
1379 case SystemZ::RISBMux: {
1380 bool DestIsHigh = SystemZ::isHighReg(MI.getOperand(0).getReg());
1381 bool SrcIsHigh = SystemZ::isHighReg(MI.getOperand(2).getReg());
1383 MI.setDesc(get(DestIsHigh ? SystemZ::RISBHH : SystemZ::RISBLL));
1385 MI.setDesc(get(DestIsHigh ? SystemZ::RISBHL : SystemZ::RISBLH));
1391 case SystemZ::ADJDYNALLOC:
1416 case SystemZ::BR:
1417 case SystemZ::BI:
1418 case SystemZ::J:
1419 case SystemZ::JG:
1420 return SystemZII::Branch(SystemZII::BranchNormal, SystemZ::CCMASK_ANY,
1421 SystemZ::CCMASK_ANY, &MI.getOperand(0));
1423 case SystemZ::BRC:
1424 case SystemZ::BRCL:
1428 case SystemZ::BRCT:
1429 case SystemZ::BRCTH:
1430 return SystemZII::Branch(SystemZII::BranchCT, SystemZ::CCMASK_ICMP,
1431 SystemZ::CCMASK_CMP_NE, &MI.getOperand(2));
1433 case SystemZ::BRCTG:
1434 return SystemZII::Branch(SystemZII::BranchCTG, SystemZ::CCMASK_ICMP,
1435 SystemZ::CCMASK_CMP_NE, &MI.getOperand(2));
1437 case SystemZ::CIJ:
1438 case SystemZ::CRJ:
1439 return SystemZII::Branch(SystemZII::BranchC, SystemZ::CCMASK_ICMP,
1442 case SystemZ::CLIJ:
1443 case SystemZ::CLRJ:
1444 return SystemZII::Branch(SystemZII::BranchCL, SystemZ::CCMASK_ICMP,
1447 case SystemZ::CGIJ:
1448 case SystemZ::CGRJ:
1449 return SystemZII::Branch(SystemZII::BranchCG, SystemZ::CCMASK_ICMP,
1452 case SystemZ::CLGIJ:
1453 case SystemZ::CLGRJ:
1454 return SystemZII::Branch(SystemZII::BranchCLG, SystemZ::CCMASK_ICMP,
1457 case SystemZ::INLINEASM_BR:
1469 if (RC == &SystemZ::GR32BitRegClass || RC == &SystemZ::ADDR32BitRegClass) {
1470 LoadOpcode = SystemZ::L;
1471 StoreOpcode = SystemZ::ST;
1472 } else if (RC == &SystemZ::GRH32BitRegClass) {
1473 LoadOpcode = SystemZ::LFH;
1474 StoreOpcode = SystemZ::STFH;
1475 } else if (RC == &SystemZ::GRX32BitRegClass) {
1476 LoadOpcode = SystemZ::LMux;
1477 StoreOpcode = SystemZ::STMux;
1478 } else if (RC == &SystemZ::GR64BitRegClass ||
1479 RC == &SystemZ::ADDR64BitRegClass) {
1480 LoadOpcode = SystemZ::LG;
1481 StoreOpcode = SystemZ::STG;
1482 } else if (RC == &SystemZ::GR128BitRegClass ||
1483 RC == &SystemZ::ADDR128BitRegClass) {
1484 LoadOpcode = SystemZ::L128;
1485 StoreOpcode = SystemZ::ST128;
1486 } else if (RC == &SystemZ::FP32BitRegClass) {
1487 LoadOpcode = SystemZ::LE;
1488 StoreOpcode = SystemZ::STE;
1489 } else if (RC == &SystemZ::FP64BitRegClass) {
1490 LoadOpcode = SystemZ::LD;
1491 StoreOpcode = SystemZ::STD;
1492 } else if (RC == &SystemZ::FP128BitRegClass) {
1493 LoadOpcode = SystemZ::LX;
1494 StoreOpcode = SystemZ::STX;
1495 } else if (RC == &SystemZ::VR32BitRegClass) {
1496 LoadOpcode = SystemZ::VL32;
1497 StoreOpcode = SystemZ::VST32;
1498 } else if (RC == &SystemZ::VR64BitRegClass) {
1499 LoadOpcode = SystemZ::VL64;
1500 StoreOpcode = SystemZ::VST64;
1501 } else if (RC == &SystemZ::VF128BitRegClass ||
1502 RC == &SystemZ::VR128BitRegClass) {
1503 LoadOpcode = SystemZ::VL;
1504 StoreOpcode = SystemZ::VST;
1515 int Disp12Opcode = SystemZ::getDisp12Opcode(Opcode);
1525 int Disp20Opcode = SystemZ::getDisp20Opcode(Opcode);
1538 case SystemZ::L: return SystemZ::LT;
1539 case SystemZ::LY: return SystemZ::LT;
1540 case SystemZ::LG: return SystemZ::LTG;
1541 case SystemZ::LGF: return SystemZ::LTGF;
1542 case SystemZ::LR: return SystemZ::LTR;
1543 case SystemZ::LGFR: return SystemZ::LTGFR;
1544 case SystemZ::LGR: return SystemZ::LTGR;
1545 case SystemZ::LER: return SystemZ::LTEBR;
1546 case SystemZ::LDR: return SystemZ::LTDBR;
1547 case SystemZ::LXR: return SystemZ::LTXBR;
1548 case SystemZ::LCDFR: return SystemZ::LCDBR;
1549 case SystemZ::LPDFR: return SystemZ::LPDBR;
1550 case SystemZ::LNDFR: return SystemZ::LNDBR;
1551 case SystemZ::LCDFR_32: return SystemZ::LCEBR;
1552 case SystemZ::LPDFR_32: return SystemZ::LPEBR;
1553 case SystemZ::LNDFR_32: return SystemZ::LNEBR;
1558 case SystemZ::RISBGN: return SystemZ::RISBG;
1610 case SystemZ::CHI:
1611 case SystemZ::CGHI:
1615 case SystemZ::CLFI:
1616 case SystemZ::CLGFI:
1620 case SystemZ::CL:
1621 case SystemZ::CLG:
1631 case SystemZ::CR:
1632 return SystemZ::CRJ;
1633 case SystemZ::CGR:
1634 return SystemZ::CGRJ;
1635 case SystemZ::CHI:
1636 return SystemZ::CIJ;
1637 case SystemZ::CGHI:
1638 return SystemZ::CGIJ;
1639 case SystemZ::CLR:
1640 return SystemZ::CLRJ;
1641 case SystemZ::CLGR:
1642 return SystemZ::CLGRJ;
1643 case SystemZ::CLFI:
1644 return SystemZ::CLIJ;
1645 case SystemZ::CLGFI:
1646 return SystemZ::CLGIJ;
1652 case SystemZ::CR:
1653 return SystemZ::CRBReturn;
1654 case SystemZ::CGR:
1655 return SystemZ::CGRBReturn;
1656 case SystemZ::CHI:
1657 return SystemZ::CIBReturn;
1658 case SystemZ::CGHI:
1659 return SystemZ::CGIBReturn;
1660 case SystemZ::CLR:
1661 return SystemZ::CLRBReturn;
1662 case SystemZ::CLGR:
1663 return SystemZ::CLGRBReturn;
1664 case SystemZ::CLFI:
1665 return SystemZ::CLIBReturn;
1666 case SystemZ::CLGFI:
1667 return SystemZ::CLGIBReturn;
1673 case SystemZ::CR:
1674 return SystemZ::CRBCall;
1675 case SystemZ::CGR:
1676 return SystemZ::CGRBCall;
1677 case SystemZ::CHI:
1678 return SystemZ::CIBCall;
1679 case SystemZ::CGHI:
1680 return SystemZ::CGIBCall;
1681 case SystemZ::CLR:
1682 return SystemZ::CLRBCall;
1683 case SystemZ::CLGR:
1684 return SystemZ::CLGRBCall;
1685 case SystemZ::CLFI:
1686 return SystemZ::CLIBCall;
1687 case SystemZ::CLGFI:
1688 return SystemZ::CLGIBCall;
1694 case SystemZ::CR:
1695 return SystemZ::CRT;
1696 case SystemZ::CGR:
1697 return SystemZ::CGRT;
1698 case SystemZ::CHI:
1699 return SystemZ::CIT;
1700 case SystemZ::CGHI:
1701 return SystemZ::CGIT;
1702 case SystemZ::CLR:
1703 return SystemZ::CLRT;
1704 case SystemZ::CLGR:
1705 return SystemZ::CLGRT;
1706 case SystemZ::CLFI:
1707 return SystemZ::CLFIT;
1708 case SystemZ::CLGFI:
1709 return SystemZ::CLGIT;
1710 case SystemZ::CL:
1711 return SystemZ::CLT;
1712 case SystemZ::CLG:
1713 return SystemZ::CLGT;
1725 case SystemZ::L:
1726 case SystemZ::LY:
1727 return SystemZ::LAT;
1728 case SystemZ::LG:
1729 return SystemZ::LGAT;
1730 case SystemZ::LFH:
1731 return SystemZ::LFHAT;
1732 case SystemZ::LLGF:
1733 return SystemZ::LLGFAT;
1734 case SystemZ::LLGT:
1735 return SystemZ::LLGTAT;
1746 Opcode = SystemZ::LGHI;
1747 else if (SystemZ::isImmLL(Value))
1748 Opcode = SystemZ::LLILL;
1749 else if (SystemZ::isImmLH(Value)) {
1750 Opcode = SystemZ::LLILH;
1754 Opcode = SystemZ::LGFI;