Lines Matching refs:SystemZ
1 //===-- SystemZISelLowering.cpp - SystemZ DAG lowering implementation -----===//
87 addRegisterClass(MVT::i32, &SystemZ::GRX32BitRegClass);
89 addRegisterClass(MVT::i32, &SystemZ::GR32BitRegClass);
90 addRegisterClass(MVT::i64, &SystemZ::GR64BitRegClass);
92 addRegisterClass(MVT::f32, &SystemZ::VR32BitRegClass);
93 addRegisterClass(MVT::f64, &SystemZ::VR64BitRegClass);
95 addRegisterClass(MVT::f32, &SystemZ::FP32BitRegClass);
96 addRegisterClass(MVT::f64, &SystemZ::FP64BitRegClass);
99 addRegisterClass(MVT::f128, &SystemZ::VR128BitRegClass);
101 addRegisterClass(MVT::f128, &SystemZ::FP128BitRegClass);
104 addRegisterClass(MVT::v16i8, &SystemZ::VR128BitRegClass);
105 addRegisterClass(MVT::v8i16, &SystemZ::VR128BitRegClass);
106 addRegisterClass(MVT::v4i32, &SystemZ::VR128BitRegClass);
107 addRegisterClass(MVT::v2i64, &SystemZ::VR128BitRegClass);
108 addRegisterClass(MVT::v4f32, &SystemZ::VR128BitRegClass);
109 addRegisterClass(MVT::v2f64, &SystemZ::VR128BitRegClass);
116 setStackPointerRegisterToSaveRestore(SystemZ::R15D);
120 // such as SystemZ has with CC, so set this to the register-pressure
246 // the atomic operations in order to exploit SystemZ instructions.
625 // VASTART and VACOPY need to deal with the SystemZ-specific varargs
711 for (; I < SystemZ::VectorBytes; ++I) {
718 if (I == SystemZ::VectorBytes) {
735 SystemZ::VectorBits / SplatBitSize);
748 SystemZ::VectorBits / SplatBitSize);
1110 return std::make_pair(0U, &SystemZ::GR64BitRegClass);
1112 return std::make_pair(0U, &SystemZ::GR128BitRegClass);
1113 return std::make_pair(0U, &SystemZ::GR32BitRegClass);
1117 return std::make_pair(0U, &SystemZ::ADDR64BitRegClass);
1119 return std::make_pair(0U, &SystemZ::ADDR128BitRegClass);
1120 return std::make_pair(0U, &SystemZ::ADDR32BitRegClass);
1123 return std::make_pair(0U, &SystemZ::GRH32BitRegClass);
1127 return std::make_pair(0U, &SystemZ::FP64BitRegClass);
1129 return std::make_pair(0U, &SystemZ::FP128BitRegClass);
1130 return std::make_pair(0U, &SystemZ::FP32BitRegClass);
1135 return std::make_pair(0U, &SystemZ::VR32BitRegClass);
1137 return std::make_pair(0U, &SystemZ::VR64BitRegClass);
1138 return std::make_pair(0U, &SystemZ::VR128BitRegClass);
1150 return parseRegisterNumber(Constraint, &SystemZ::GR32BitRegClass,
1153 return parseRegisterNumber(Constraint, &SystemZ::GR128BitRegClass,
1155 return parseRegisterNumber(Constraint, &SystemZ::GR64BitRegClass,
1160 return parseRegisterNumber(Constraint, &SystemZ::FP32BitRegClass,
1163 return parseRegisterNumber(Constraint, &SystemZ::FP128BitRegClass,
1165 return parseRegisterNumber(Constraint, &SystemZ::FP64BitRegClass,
1170 return parseRegisterNumber(Constraint, &SystemZ::VR32BitRegClass,
1173 return parseRegisterNumber(Constraint, &SystemZ::VR64BitRegClass,
1175 return parseRegisterNumber(Constraint, &SystemZ::VR128BitRegClass,
1236 static const MCPhysReg ScratchRegs[] = { SystemZ::R0D, SystemZ::R1D,
1237 SystemZ::R14D, 0 };
1361 RC = &SystemZ::GR32BitRegClass;
1365 RC = &SystemZ::GR64BitRegClass;
1369 RC = &SystemZ::FP32BitRegClass;
1373 RC = &SystemZ::FP64BitRegClass;
1381 RC = &SystemZ::VR128BitRegClass;
1446 if (NumFixedFPRs < SystemZ::NumArgFPRs) {
1447 SDValue MemOps[SystemZ::NumArgFPRs];
1448 for (unsigned I = NumFixedFPRs; I < SystemZ::NumArgFPRs; ++I) {
1449 unsigned Offset = TFL->getRegSpillOffset(SystemZ::ArgFPRs[I]);
1452 unsigned VReg = MF.addLiveIn(SystemZ::ArgFPRs[I],
1453 &SystemZ::FP64BitRegClass);
1461 SystemZ::NumArgFPRs-NumFixedFPRs));
1481 if (Reg == SystemZ::R6H || Reg == SystemZ::R6L || Reg == SystemZ::R6D)
1570 StackPtr = DAG.getCopyFromReg(Chain, DL, SystemZ::R15D, PtrVT);
1598 Chain = DAG.getCopyToReg(Chain, DL, SystemZ::R1D, Callee, Glue);
1600 Callee = DAG.getRegister(SystemZ::R1D, Callee.getValueType());
1750 CCValid = SystemZ::CCMASK_TBEGIN;
1755 CCValid = SystemZ::CCMASK_TBEGIN;
1760 CCValid = SystemZ::CCMASK_TEND;
1778 CCValid = SystemZ::CCMASK_VCMP;
1785 CCValid = SystemZ::CCMASK_VCMP;
1793 CCValid = SystemZ::CCMASK_VCMP;
1801 CCValid = SystemZ::CCMASK_VCMP;
1809 CCValid = SystemZ::CCMASK_VCMP;
1814 CCValid = SystemZ::CCMASK_VCMP;
1821 CCValid = SystemZ::CCMASK_ANY;
1828 CCValid = SystemZ::CCMASK_ANY;
1835 CCValid = SystemZ::CCMASK_ANY;
1842 CCValid = SystemZ::CCMASK_ANY;
1849 CCValid = SystemZ::CCMASK_ANY;
1856 CCValid = SystemZ::CCMASK_ANY;
1863 CCValid = SystemZ::CCMASK_0 | SystemZ::CCMASK_3;
1870 CCValid = SystemZ::CCMASK_ANY;
1877 CCValid = SystemZ::CCMASK_ANY;
1884 CCValid = SystemZ::CCMASK_ANY;
1891 CCValid = SystemZ::CCMASK_ANY;
1897 CCValid = SystemZ::CCMASK_VCMP;
1903 CCValid = SystemZ::CCMASK_VCMP;
1909 CCValid = SystemZ::CCMASK_VCMP;
1915 CCValid = SystemZ::CCMASK_VCMP;
1920 CCValid = SystemZ::CCMASK_TDC;
1969 case ISD::SET##X: return SystemZ::CCMASK_CMP_##X; \
1970 case ISD::SETO##X: return SystemZ::CCMASK_CMP_##X; \
1971 case ISD::SETU##X: return SystemZ::CCMASK_CMP_UO | SystemZ::CCMASK_CMP_##X
1984 case ISD::SETO: return SystemZ::CCMASK_CMP_O;
1985 case ISD::SETUO: return SystemZ::CCMASK_CMP_UO;
2001 if ((Value == -1 && C.CCMask == SystemZ::CCMASK_CMP_GT) ||
2002 (Value == -1 && C.CCMask == SystemZ::CCMASK_CMP_LE) ||
2003 (Value == 1 && C.CCMask == SystemZ::CCMASK_CMP_LT) ||
2004 (Value == 1 && C.CCMask == SystemZ::CCMASK_CMP_GE)) {
2005 C.CCMask ^= SystemZ::CCMASK_CMP_EQ;
2044 if (Value == 0 && C.CCMask == SystemZ::CCMASK_CMP_LT)
2046 Value = 127, C.CCMask = SystemZ::CCMASK_CMP_GT;
2047 else if (Value == 0 && C.CCMask == SystemZ::CCMASK_CMP_GE)
2049 Value = 128, C.CCMask = SystemZ::CCMASK_CMP_LT;
2167 return ((CCMask & SystemZ::CCMASK_CMP_EQ) |
2168 (CCMask & SystemZ::CCMASK_CMP_GT ? SystemZ::CCMASK_CMP_LT : 0) |
2169 (CCMask & SystemZ::CCMASK_CMP_LT ? SystemZ::CCMASK_CMP_GT : 0) |
2170 (CCMask & SystemZ::CCMASK_CMP_UO));
2178 if (C.CCMask == SystemZ::CCMASK_CMP_EQ ||
2179 C.CCMask == SystemZ::CCMASK_CMP_NE) {
2291 if (!SystemZ::isImmLL(Mask) && !SystemZ::isImmLH(Mask) &&
2292 !SystemZ::isImmHL(Mask) && !SystemZ::isImmHH(Mask))
2306 if (CCMask == SystemZ::CCMASK_CMP_EQ)
2307 return SystemZ::CCMASK_TM_ALL_0;
2308 if (CCMask == SystemZ::CCMASK_CMP_NE)
2309 return SystemZ::CCMASK_TM_SOME_1;
2312 if (CCMask == SystemZ::CCMASK_CMP_LT)
2313 return SystemZ::CCMASK_TM_ALL_0;
2314 if (CCMask == SystemZ::CCMASK_CMP_GE)
2315 return SystemZ::CCMASK_TM_SOME_1;
2318 if (CCMask == SystemZ::CCMASK_CMP_LE)
2319 return SystemZ::CCMASK_TM_ALL_0;
2320 if (CCMask == SystemZ::CCMASK_CMP_GT)
2321 return SystemZ::CCMASK_TM_SOME_1;
2326 if (CCMask == SystemZ::CCMASK_CMP_EQ)
2327 return SystemZ::CCMASK_TM_ALL_1;
2328 if (CCMask == SystemZ::CCMASK_CMP_NE)
2329 return SystemZ::CCMASK_TM_SOME_0;
2332 if (CCMask == SystemZ::CCMASK_CMP_GT)
2333 return SystemZ::CCMASK_TM_ALL_1;
2334 if (CCMask == SystemZ::CCMASK_CMP_LE)
2335 return SystemZ::CCMASK_TM_SOME_0;
2338 if (CCMask == SystemZ::CCMASK_CMP_GE)
2339 return SystemZ::CCMASK_TM_ALL_1;
2340 if (CCMask == SystemZ::CCMASK_CMP_LT)
2341 return SystemZ::CCMASK_TM_SOME_0;
2346 if (CCMask == SystemZ::CCMASK_CMP_LE)
2347 return SystemZ::CCMASK_TM_MSB_0;
2348 if (CCMask == SystemZ::CCMASK_CMP_GT)
2349 return SystemZ::CCMASK_TM_MSB_1;
2352 if (CCMask == SystemZ::CCMASK_CMP_LT)
2353 return SystemZ::CCMASK_TM_MSB_0;
2354 if (CCMask == SystemZ::CCMASK_CMP_GE)
2355 return SystemZ::CCMASK_TM_MSB_1;
2361 if (CCMask == SystemZ::CCMASK_CMP_EQ && CmpVal == Low)
2362 return SystemZ::CCMASK_TM_MIXED_MSB_0;
2363 if (CCMask == SystemZ::CCMASK_CMP_NE && CmpVal == Low)
2364 return SystemZ::CCMASK_TM_MIXED_MSB_0 ^ SystemZ::CCMASK_ANY;
2365 if (CCMask == SystemZ::CCMASK_CMP_EQ && CmpVal == High)
2366 return SystemZ::CCMASK_TM_MIXED_MSB_1;
2367 if (CCMask == SystemZ::CCMASK_CMP_NE && CmpVal == High)
2368 return SystemZ::CCMASK_TM_MIXED_MSB_1 ^ SystemZ::CCMASK_ANY;
2401 NewC.CCMask == SystemZ::CCMASK_CMP_EQ ||
2402 NewC.CCMask == SystemZ::CCMASK_CMP_NE ||
2406 if (NewC.CCMask == SystemZ::CCMASK_CMP_LE ||
2407 NewC.CCMask == SystemZ::CCMASK_CMP_GT) {
2411 NewC.CCMask ^= SystemZ::CCMASK_CMP_EQ;
2461 C.CCValid = SystemZ::CCMASK_TM;
2539 C.CCValid = SystemZ::CCMASK_FCMP;
2549 C.CCValid = SystemZ::CCMASK_ICMP;
2556 if (C.CCMask == SystemZ::CCMASK_CMP_EQ ||
2557 C.CCMask == SystemZ::CCMASK_CMP_NE ||
2560 else if (C.CCMask & SystemZ::CCMASK_CMP_UO)
2564 C.CCMask &= ~SystemZ::CCMASK_CMP_UO;
2601 bool RegisterOnly = (bool(C.CCMask & SystemZ::CCMASK_TM_MIXED_MSB_0) !=
2602 bool(C.CCMask & SystemZ::CCMASK_TM_MIXED_MSB_1));
2637 Even = DAG.getTargetExtractSubreg(SystemZ::even128(Is32Bit), DL, VT, Result);
2638 Odd = DAG.getTargetExtractSubreg(SystemZ::odd128(Is32Bit), DL, VT, Result);
2948 C.CCMask != SystemZ::CCMASK_CMP_EQ &&
2949 C.CCMask != SystemZ::CCMASK_CMP_NE &&
2953 return getAbsolute(DAG, DL, TrueOp, C.CCMask & SystemZ::CCMASK_CMP_LT);
2955 return getAbsolute(DAG, DL, FalseOp, C.CCMask & SystemZ::CCMASK_CMP_GT);
3028 Chain = DAG.getCopyToReg(Chain, DL, SystemZ::R12D, GOT, Glue);
3030 Chain = DAG.getCopyToReg(Chain, DL, SystemZ::R2D, GOTOffset, Glue);
3042 Ops.push_back(DAG.getRegister(SystemZ::R2D, PtrVT));
3043 Ops.push_back(DAG.getRegister(SystemZ::R12D, PtrVT));
3061 return DAG.getCopyFromReg(Chain, DL, SystemZ::R2D, PtrVT, Glue);
3070 SDValue TPHi = DAG.getCopyFromReg(Chain, DL, SystemZ::A0, MVT::i32);
3074 SDValue TPLo = DAG.getCopyFromReg(Chain, DL, SystemZ::A1, MVT::i32);
3258 unsigned LinkReg = MF.addLiveIn(SystemZ::R14D, &SystemZ::GR64BitRegClass);
3286 In64 = DAG.getTargetInsertSubreg(SystemZ::subreg_h32, DL,
3294 return DAG.getTargetExtractSubreg(SystemZ::subreg_h32,
3299 SDValue In64 = DAG.getTargetInsertSubreg(SystemZ::subreg_h32, DL,
3303 return DAG.getTargetExtractSubreg(SystemZ::subreg_h32, DL,
3589 return DAG.getTargetInsertSubreg(SystemZ::subreg_l32, DL,
3608 CCValid = SystemZ::CCMASK_ARITH;
3609 CCMask = SystemZ::CCMASK_ARITH_OVERFLOW;
3613 CCValid = SystemZ::CCMASK_ARITH;
3614 CCMask = SystemZ::CCMASK_ARITH_OVERFLOW;
3618 CCValid = SystemZ::CCMASK_LOGICAL;
3619 CCMask = SystemZ::CCMASK_LOGICAL_CARRY;
3623 CCValid = SystemZ::CCMASK_LOGICAL;
3624 CCMask = SystemZ::CCMASK_LOGICAL_BORROW;
3676 CCValid = SystemZ::CCMASK_LOGICAL;
3677 CCMask = SystemZ::CCMASK_LOGICAL_CARRY;
3684 CCValid = SystemZ::CCMASK_LOGICAL;
3685 CCMask = SystemZ::CCMASK_LOGICAL_BORROW;
3790 return SDValue(DAG.getMachineNode(SystemZ::Serialize, DL, MVT::Other,
3818 Chain = SDValue(DAG.getMachineNode(SystemZ::Serialize, SDLoc(Op),
3954 SystemZ::CCMASK_CS, SystemZ::CCMASK_CS_EQ);
3989 SystemZ::CCMASK_ICMP, SystemZ::CCMASK_CMP_EQ);
4026 SystemZ::R15D, Op.getValueType());
4045 SDValue OldSP = DAG.getCopyFromReg(Chain, DL, SystemZ::R15D, MVT::i64);
4049 Chain = DAG.getCopyToReg(Chain, DL, SystemZ::R15D, NewSP);
4066 unsigned Code = IsWrite ? SystemZ::PFD_WRITE : SystemZ::PFD_READ;
4080 DAG.getConstant(SystemZ::IPM_CC, DL, MVT::i32));
4169 unsigned char Bytes[SystemZ::VectorBytes];
4248 for (unsigned I = 0; I < SystemZ::VectorBytes; ++I) {
4254 if ((Elt ^ P.Bytes[I]) & (SystemZ::VectorBytes - 1))
4256 int ModelOpNo = P.Bytes[I] / SystemZ::VectorBytes;
4257 int RealOpNo = unsigned(Elt) / SystemZ::VectorBytes;
4286 for (unsigned From = 0; From < SystemZ::VectorBytes; ++From) {
4294 if (To == SystemZ::VectorBytes)
4377 int ExpectedShift = (Index - I) % SystemZ::VectorBytes;
4378 int ModelOpNo = unsigned(ExpectedShift + I) / SystemZ::VectorBytes;
4379 int RealOpNo = unsigned(Index) / SystemZ::VectorBytes;
4406 SystemZ::VectorBytes / InBytes);
4415 SystemZ::VectorBytes / P.Operand);
4440 SDValue IndexNodes[SystemZ::VectorBytes];
4441 for (unsigned I = 0; I < SystemZ::VectorBytes; ++I)
4459 SmallVector<SDValue, SystemZ::VectorBytes> Ops;
4462 // result comes from byte Bytes[I] % SystemZ::VectorBytes of operand
4463 // Bytes[I] / SystemZ::VectorBytes.
4464 SmallVector<int, SystemZ::VectorBytes> Bytes;
4498 unsigned Byte = ((Elem * FromBytesPerElement) % SystemZ::VectorBytes +
4508 SmallVector<int, SystemZ::VectorBytes> OpBytes;
4518 Op = Op.getOperand(unsigned(NewByte) / SystemZ::VectorBytes);
4519 Byte = unsigned(NewByte) % SystemZ::VectorBytes;
4536 unsigned Base = OpNo * SystemZ::VectorBytes + Byte;
4545 assert(Bytes.size() == SystemZ::VectorBytes && "Incomplete vector");
4569 SmallVector<int, SystemZ::VectorBytes> NewBytes(SystemZ::VectorBytes);
4570 for (unsigned J = 0; J < SystemZ::VectorBytes; ++J) {
4571 unsigned OpNo = unsigned(Bytes[J]) / SystemZ::VectorBytes;
4572 unsigned Byte = unsigned(Bytes[J]) % SystemZ::VectorBytes;
4576 NewBytes[J] = SystemZ::VectorBytes + Byte;
4581 SmallVector<int, SystemZ::VectorBytes> NewBytesMap(SystemZ::VectorBytes);
4585 for (unsigned J = 0; J < SystemZ::VectorBytes; ++J) {
4587 assert(unsigned(NewBytesMap[J]) < SystemZ::VectorBytes &&
4589 Bytes[J] = I * SystemZ::VectorBytes + NewBytesMap[J];
4596 for (unsigned J = 0; J < SystemZ::VectorBytes; ++J)
4598 Bytes[J] = I * SystemZ::VectorBytes + J;
4606 for (unsigned I = 0; I < SystemZ::VectorBytes; ++I)
4607 if (Bytes[I] >= int(SystemZ::VectorBytes))
4608 Bytes[I] -= (Stride - 1) * SystemZ::VectorBytes;
4695 SmallVector<SDValue, SystemZ::VectorBytes> ResidueOps;
4819 SmallVector<SDValue, SystemZ::VectorBytes> Constants(NumElements, SDValue());
4820 SmallVector<bool, SystemZ::VectorBytes> Done(NumElements, false);
4911 SmallVector<SDValue, SystemZ::VectorBytes> Ops(NumElements);
5027 SystemZ::VectorBits / FromBits);
5221 SDNode *Pair = DAG.getMachineNode(SystemZ::PAIR128, DL,
5228 SDValue Hi = DAG.getTargetExtractSubreg(SystemZ::subreg_h64,
5230 SDValue Lo = DAG.getTargetExtractSubreg(SystemZ::subreg_l64,
5264 Res = SDValue(DAG.getMachineNode(SystemZ::Serialize, DL,
5279 SystemZ::CCMASK_CS, SystemZ::CCMASK_CS_EQ);
5465 SmallVector<int, SystemZ::VectorBytes> Bytes;
5685 SystemZ::VectorBytes / ElemBytes / 2);
6177 if (CCValid != SystemZ::CCMASK_ICMP)
6191 if (CCMask == SystemZ::CCMASK_CMP_NE)
6193 else if (CCMask != SystemZ::CCMASK_CMP_EQ)
6232 if (!SHLCount || SHLCount->getZExtValue() != 30 - SystemZ::IPM_CC)
6247 case SystemZ::CCMASK_CMP_EQ: break;
6248 case SystemZ::CCMASK_CMP_NE: break;
6249 case SystemZ::CCMASK_CMP_LT: CCMask = SystemZ::CCMASK_CMP_GT; break;
6250 case SystemZ::CCMASK_CMP_GT: CCMask = SystemZ::CCMASK_CMP_LT; break;
6251 case SystemZ::CCMASK_CMP_LE: CCMask = SystemZ::CCMASK_CMP_GE; break;
6252 case SystemZ::CCMASK_CMP_GE: CCMask = SystemZ::CCMASK_CMP_LE; break;
6360 // multiplication node. The only option for SystemZ is ISD::SMUL_LOHI, and
6735 Register Reg = MRI.createVirtualRegister(&SystemZ::ADDR64BitRegClass);
6736 BuildMI(*MBB, MI, MI.getDebugLoc(), TII->get(SystemZ::LA), Reg)
6751 if (mi.readsRegister(SystemZ::CC))
6753 if (mi.definesRegister(SystemZ::CC))
6761 if ((*SI)->isLiveIn(SystemZ::CC))
6773 case SystemZ::Select32:
6774 case SystemZ::Select64:
6775 case SystemZ::SelectF32:
6776 case SystemZ::SelectF64:
6777 case SystemZ::SelectF128:
6778 case SystemZ::SelectVR32:
6779 case SystemZ::SelectVR64:
6780 case SystemZ::SelectVR128:
6830 BuildMI(*SinkMBB, SinkInsertionPoint, DL, TII->get(SystemZ::PHI), DestReg)
6872 if (NextMIIt->definesRegister(SystemZ::CC) ||
6893 (LastMI->killsRegister(SystemZ::CC) || checkCCKill(*LastMI, MBB));
6901 FalseMBB->addLiveIn(SystemZ::CC);
6902 JoinMBB->addLiveIn(SystemZ::CC);
6909 BuildMI(MBB, MI.getDebugLoc(), TII->get(SystemZ::BRC))
6994 if (!MI.killsRegister(SystemZ::CC) && !checkCCKill(MI, JoinMBB)) {
6995 FalseMBB->addLiveIn(SystemZ::CC);
6996 JoinMBB->addLiveIn(SystemZ::CC);
7003 BuildMI(MBB, DL, TII->get(SystemZ::BRC))
7053 &SystemZ::GR32BitRegClass :
7054 &SystemZ::GR64BitRegClass);
7055 unsigned LOpcode = BitSize <= 32 ? SystemZ::L : SystemZ::LG;
7056 unsigned CSOpcode = BitSize <= 32 ? SystemZ::CS : SystemZ::CSG;
7093 BuildMI(MBB, DL, TII->get(SystemZ::PHI), OldVal)
7097 BuildMI(MBB, DL, TII->get(SystemZ::RLL), RotatedOldVal)
7105 BuildMI(MBB, DL, TII->get(SystemZ::XILF), RotatedNewVal)
7111 BuildMI(MBB, DL, TII->get(SystemZ::LCGR), Tmp2).addReg(Tmp);
7112 BuildMI(MBB, DL, TII->get(SystemZ::AGHI), RotatedNewVal)
7123 BuildMI(MBB, DL, TII->get(SystemZ::RISBG32), RotatedNewVal)
7127 BuildMI(MBB, DL, TII->get(SystemZ::RLL), NewVal)
7134 BuildMI(MBB, DL, TII->get(SystemZ::BRC))
7135 .addImm(SystemZ::CCMASK_CS).addImm(SystemZ::CCMASK_CS_NE).addMBB(LoopMBB);
7171 &SystemZ::GR32BitRegClass :
7172 &SystemZ::GR64BitRegClass);
7173 unsigned LOpcode = BitSize <= 32 ? SystemZ::L : SystemZ::LG;
7174 unsigned CSOpcode = BitSize <= 32 ? SystemZ::CS : SystemZ::CSG;
7210 BuildMI(MBB, DL, TII->get(SystemZ::PHI), OldVal)
7214 BuildMI(MBB, DL, TII->get(SystemZ::RLL), RotatedOldVal)
7218 BuildMI(MBB, DL, TII->get(SystemZ::BRC))
7219 .addImm(SystemZ::CCMASK_ICMP).addImm(KeepOldMask).addMBB(UpdateMBB);
7228 BuildMI(MBB, DL, TII->get(SystemZ::RISBG32), RotatedAltVal)
7241 BuildMI(MBB, DL, TII->get(SystemZ::PHI), RotatedNewVal)
7245 BuildMI(MBB, DL, TII->get(SystemZ::RLL), NewVal)
7252 BuildMI(MBB, DL, TII->get(SystemZ::BRC))
7253 .addImm(SystemZ::CCMASK_CS).addImm(SystemZ::CCMASK_CS_NE).addMBB(LoopMBB);
7283 const TargetRegisterClass *RC = &SystemZ::GR32BitRegClass;
7286 unsigned LOpcode = TII->getOpcodeForOffset(SystemZ::L, Disp);
7287 unsigned CSOpcode = TII->getOpcodeForOffset(SystemZ::CS, Disp);
7332 BuildMI(MBB, DL, TII->get(SystemZ::PHI), OldVal)
7335 BuildMI(MBB, DL, TII->get(SystemZ::PHI), CmpVal)
7338 BuildMI(MBB, DL, TII->get(SystemZ::PHI), SwapVal)
7341 BuildMI(MBB, DL, TII->get(SystemZ::RLL), Dest)
7343 BuildMI(MBB, DL, TII->get(SystemZ::RISBG32), RetryCmpVal)
7345 BuildMI(MBB, DL, TII->get(SystemZ::CR))
7347 BuildMI(MBB, DL, TII->get(SystemZ::BRC))
7348 .addImm(SystemZ::CCMASK_ICMP)
7349 .addImm(SystemZ::CCMASK_CMP_NE).addMBB(DoneMBB);
7363 BuildMI(MBB, DL, TII->get(SystemZ::RISBG32), RetrySwapVal)
7365 BuildMI(MBB, DL, TII->get(SystemZ::RLL), StoreVal)
7372 BuildMI(MBB, DL, TII->get(SystemZ::BRC))
7373 .addImm(SystemZ::CCMASK_CS).addImm(SystemZ::CCMASK_CS_NE).addMBB(LoopMBB);
7380 if (!MI.registerDefIsDead(SystemZ::CC))
7381 DoneMBB->addLiveIn(SystemZ::CC);
7400 Register Tmp1 = MRI.createVirtualRegister(&SystemZ::GR128BitRegClass);
7401 Register Tmp2 = MRI.createVirtualRegister(&SystemZ::GR128BitRegClass);
7405 .addReg(Tmp1).addReg(Hi).addImm(SystemZ::subreg_h64);
7407 .addReg(Tmp2).addReg(Lo).addImm(SystemZ::subreg_l64);
7427 Register In128 = MRI.createVirtualRegister(&SystemZ::GR128BitRegClass);
7431 Register NewIn128 = MRI.createVirtualRegister(&SystemZ::GR128BitRegClass);
7432 Register Zero64 = MRI.createVirtualRegister(&SystemZ::GR64BitRegClass);
7434 BuildMI(*MBB, MI, DL, TII->get(SystemZ::LLILL), Zero64)
7437 .addReg(In128).addReg(Zero64).addImm(SystemZ::subreg_h64);
7441 .addReg(In128).addReg(Src).addImm(SystemZ::subreg_l64);
7463 MachineBasicBlock *EndMBB = (Length > 256 && Opcode == SystemZ::CLC ?
7475 const TargetRegisterClass *RC = &SystemZ::ADDR64BitRegClass;
7483 RC = &SystemZ::GR64BitRegClass;
7510 BuildMI(MBB, DL, TII->get(SystemZ::PHI), ThisDestReg)
7514 BuildMI(MBB, DL, TII->get(SystemZ::PHI), ThisSrcReg)
7517 BuildMI(MBB, DL, TII->get(SystemZ::PHI), ThisCountReg)
7520 if (Opcode == SystemZ::MVC)
7521 BuildMI(MBB, DL, TII->get(SystemZ::PFD))
7522 .addImm(SystemZ::PFD_WRITE)
7528 BuildMI(MBB, DL, TII->get(SystemZ::BRC))
7529 .addImm(SystemZ::CCMASK_ICMP).addImm(SystemZ::CCMASK_CMP_NE)
7546 BuildMI(MBB, DL, TII->get(SystemZ::LA), NextDestReg)
7549 BuildMI(MBB, DL, TII->get(SystemZ::LA), NextSrcReg)
7551 BuildMI(MBB, DL, TII->get(SystemZ::AGHI), NextCountReg)
7553 BuildMI(MBB, DL, TII->get(SystemZ::CGHI))
7555 BuildMI(MBB, DL, TII->get(SystemZ::BRC))
7556 .addImm(SystemZ::CCMASK_ICMP).addImm(SystemZ::CCMASK_CMP_NE)
7567 DoneMBB->addLiveIn(SystemZ::CC);
7576 Register Reg = MRI.createVirtualRegister(&SystemZ::ADDR64BitRegClass);
7577 BuildMI(*MBB, MI, MI.getDebugLoc(), TII->get(SystemZ::LAY), Reg)
7585 Register Reg = MRI.createVirtualRegister(&SystemZ::ADDR64BitRegClass);
7586 BuildMI(*MBB, MI, MI.getDebugLoc(), TII->get(SystemZ::LAY), Reg)
7607 BuildMI(MBB, DL, TII->get(SystemZ::BRC))
7608 .addImm(SystemZ::CCMASK_ICMP).addImm(SystemZ::CCMASK_CMP_NE)
7618 MBB->addLiveIn(SystemZ::CC);
7640 const TargetRegisterClass *RC = &SystemZ::GR64BitRegClass;
7664 BuildMI(MBB, DL, TII->get(SystemZ::PHI), This1Reg)
7667 BuildMI(MBB, DL, TII->get(SystemZ::PHI), This2Reg)
7670 BuildMI(MBB, DL, TII->get(TargetOpcode::COPY), SystemZ::R0L).addReg(CharReg);
7674 BuildMI(MBB, DL, TII->get(SystemZ::BRC))
7675 .addImm(SystemZ::CCMASK_ANY).addImm(SystemZ::CCMASK_3).addMBB(LoopMBB);
7679 DoneMBB->addLiveIn(SystemZ::CC);
7761 case SystemZ::Select32:
7762 case SystemZ::Select64:
7763 case SystemZ::SelectF32:
7764 case SystemZ::SelectF64:
7765 case SystemZ::SelectF128:
7766 case SystemZ::SelectVR32:
7767 case SystemZ::SelectVR64:
7768 case SystemZ::SelectVR128:
7771 case SystemZ::CondStore8Mux:
7772 return emitCondStore(MI, MBB, SystemZ::STCMux, 0, false);
7773 case SystemZ::CondStore8MuxInv:
7774 return emitCondStore(MI, MBB, SystemZ::STCMux, 0, true);
7775 case SystemZ::CondStore16Mux:
7776 return emitCondStore(MI, MBB, SystemZ::STHMux, 0, false);
7777 case SystemZ::CondStore16MuxInv:
7778 return emitCondStore(MI, MBB, SystemZ::STHMux, 0, true);
7779 case SystemZ::CondStore32Mux:
7780 return emitCondStore(MI, MBB, SystemZ::STMux, SystemZ::STOCMux, false);
7781 case SystemZ::CondStore32MuxInv:
7782 return emitCondStore(MI, MBB, SystemZ::STMux, SystemZ::STOCMux, true);
7783 case SystemZ::CondStore8:
7784 return emitCondStore(MI, MBB, SystemZ::STC, 0, false);
7785 case SystemZ::CondStore8Inv:
7786 return emitCondStore(MI, MBB, SystemZ::STC, 0, true);
7787 case SystemZ::CondStore16:
7788 return emitCondStore(MI, MBB, SystemZ::STH, 0, false);
7789 case SystemZ::CondStore16Inv:
7790 return emitCondStore(MI, MBB, SystemZ::STH, 0, true);
7791 case SystemZ::CondStore32:
7792 return emitCondStore(MI, MBB, SystemZ::ST, SystemZ::STOC, false);
7793 case SystemZ::CondStore32Inv:
7794 return emitCondStore(MI, MBB, SystemZ::ST, SystemZ::STOC, true);
7795 case SystemZ::CondStore64:
7796 return emitCondStore(MI, MBB, SystemZ::STG, SystemZ::STOCG, false);
7797 case SystemZ::CondStore64Inv:
7798 return emitCondStore(MI, MBB, SystemZ::STG, SystemZ::STOCG, true);
7799 case SystemZ::CondStoreF32:
7800 return emitCondStore(MI, MBB, SystemZ::STE, 0, false);
7801 case SystemZ::CondStoreF32Inv:
7802 return emitCondStore(MI, MBB, SystemZ::STE, 0, true);
7803 case SystemZ::CondStoreF64:
7804 return emitCondStore(MI, MBB, SystemZ::STD, 0, false);
7805 case SystemZ::CondStoreF64Inv:
7806 return emitCondStore(MI, MBB, SystemZ::STD, 0, true);
7808 case SystemZ::PAIR128:
7810 case SystemZ::AEXT128:
7812 case SystemZ::ZEXT128:
7815 case SystemZ::ATOMIC_SWAPW:
7817 case SystemZ::ATOMIC_SWAP_32:
7819 case SystemZ::ATOMIC_SWAP_64:
7822 case SystemZ::ATOMIC_LOADW_AR:
7823 return emitAtomicLoadBinary(MI, MBB, SystemZ::AR, 0);
7824 case SystemZ::ATOMIC_LOADW_AFI:
7825 return emitAtomicLoadBinary(MI, MBB, SystemZ::AFI, 0);
7826 case SystemZ::ATOMIC_LOAD_AR:
7827 return emitAtomicLoadBinary(MI, MBB, SystemZ::AR, 32);
7828 case SystemZ::ATOMIC_LOAD_AHI:
7829 return emitAtomicLoadBinary(MI, MBB, SystemZ::AHI, 32);
7830 case SystemZ::ATOMIC_LOAD_AFI:
7831 return emitAtomicLoadBinary(MI, MBB, SystemZ::AFI, 32);
7832 case SystemZ::ATOMIC_LOAD_AGR:
7833 return emitAtomicLoadBinary(MI, MBB, SystemZ::AGR, 64);
7834 case SystemZ::ATOMIC_LOAD_AGHI:
7835 return emitAtomicLoadBinary(MI, MBB, SystemZ::AGHI, 64);
7836 case SystemZ::ATOMIC_LOAD_AGFI:
7837 return emitAtomicLoadBinary(MI, MBB, SystemZ::AGFI, 64);
7839 case SystemZ::ATOMIC_LOADW_SR:
7840 return emitAtomicLoadBinary(MI, MBB, SystemZ::SR, 0);
7841 case SystemZ::ATOMIC_LOAD_SR:
7842 return emitAtomicLoadBinary(MI, MBB, SystemZ::SR, 32);
7843 case SystemZ::ATOMIC_LOAD_SGR:
7844 return emitAtomicLoadBinary(MI, MBB, SystemZ::SGR, 64);
7846 case SystemZ::ATOMIC_LOADW_NR:
7847 return emitAtomicLoadBinary(MI, MBB, SystemZ::NR, 0);
7848 case SystemZ::ATOMIC_LOADW_NILH:
7849 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILH, 0);
7850 case SystemZ::ATOMIC_LOAD_NR:
7851 return emitAtomicLoadBinary(MI, MBB, SystemZ::NR, 32);
7852 case SystemZ::ATOMIC_LOAD_NILL:
7853 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILL, 32);
7854 case SystemZ::ATOMIC_LOAD_NILH:
7855 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILH, 32);
7856 case SystemZ::ATOMIC_LOAD_NILF:
7857 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILF, 32);
7858 case SystemZ::ATOMIC_LOAD_NGR:
7859 return emitAtomicLoadBinary(MI, MBB, SystemZ::NGR, 64);
7860 case SystemZ::ATOMIC_LOAD_NILL64:
7861 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILL64, 64);
7862 case SystemZ::ATOMIC_LOAD_NILH64:
7863 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILH64, 64);
7864 case SystemZ::ATOMIC_LOAD_NIHL64:
7865 return emitAtomicLoadBinary(MI, MBB, SystemZ::NIHL64, 64);
7866 case SystemZ::ATOMIC_LOAD_NIHH64:
7867 return emitAtomicLoadBinary(MI, MBB, SystemZ::NIHH64, 64);
7868 case SystemZ::ATOMIC_LOAD_NILF64:
7869 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILF64, 64);
7870 case SystemZ::ATOMIC_LOAD_NIHF64:
7871 return emitAtomicLoadBinary(MI, MBB, SystemZ::NIHF64, 64);
7873 case SystemZ::ATOMIC_LOADW_OR:
7874 return emitAtomicLoadBinary(MI, MBB, SystemZ::OR, 0);
7875 case SystemZ::ATOMIC_LOADW_OILH:
7876 return emitAtomicLoadBinary(MI, MBB, SystemZ::OILH, 0);
7877 case SystemZ::ATOMIC_LOAD_OR:
7878 return emitAtomicLoadBinary(MI, MBB, SystemZ::OR, 32);
7879 case SystemZ::ATOMIC_LOAD_OILL:
7880 return emitAtomicLoadBinary(MI, MBB, SystemZ::OILL, 32);
7881 case SystemZ::ATOMIC_LOAD_OILH:
7882 return emitAtomicLoadBinary(MI, MBB, SystemZ::OILH, 32);
7883 case SystemZ::ATOMIC_LOAD_OILF:
7884 return emitAtomicLoadBinary(MI, MBB, SystemZ::OILF, 32);
7885 case SystemZ::ATOMIC_LOAD_OGR:
7886 return emitAtomicLoadBinary(MI, MBB, SystemZ::OGR, 64);
7887 case SystemZ::ATOMIC_LOAD_OILL64:
7888 return emitAtomicLoadBinary(MI, MBB, SystemZ::OILL64, 64);
7889 case SystemZ::ATOMIC_LOAD_OILH64:
7890 return emitAtomicLoadBinary(MI, MBB, SystemZ::OILH64, 64);
7891 case SystemZ::ATOMIC_LOAD_OIHL64:
7892 return emitAtomicLoadBinary(MI, MBB, SystemZ::OIHL64, 64);
7893 case SystemZ::ATOMIC_LOAD_OIHH64:
7894 return emitAtomicLoadBinary(MI, MBB, SystemZ::OIHH64, 64);
7895 case SystemZ::ATOMIC_LOAD_OILF64:
7896 return emitAtomicLoadBinary(MI, MBB, SystemZ::OILF64, 64);
7897 case SystemZ::ATOMIC_LOAD_OIHF64:
7898 return emitAtomicLoadBinary(MI, MBB, SystemZ::OIHF64, 64);
7900 case SystemZ::ATOMIC_LOADW_XR:
7901 return emitAtomicLoadBinary(MI, MBB, SystemZ::XR, 0);
7902 case SystemZ::ATOMIC_LOADW_XILF:
7903 return emitAtomicLoadBinary(MI, MBB, SystemZ::XILF, 0);
7904 case SystemZ::ATOMIC_LOAD_XR:
7905 return emitAtomicLoadBinary(MI, MBB, SystemZ::XR, 32);
7906 case SystemZ::ATOMIC_LOAD_XILF:
7907 return emitAtomicLoadBinary(MI, MBB, SystemZ::XILF, 32);
7908 case SystemZ::ATOMIC_LOAD_XGR:
7909 return emitAtomicLoadBinary(MI, MBB, SystemZ::XGR, 64);
7910 case SystemZ::ATOMIC_LOAD_XILF64:
7911 return emitAtomicLoadBinary(MI, MBB, SystemZ::XILF64, 64);
7912 case SystemZ::ATOMIC_LOAD_XIHF64:
7913 return emitAtomicLoadBinary(MI, MBB, SystemZ::XIHF64, 64);
7915 case SystemZ::ATOMIC_LOADW_NRi:
7916 return emitAtomicLoadBinary(MI, MBB, SystemZ::NR, 0, true);
7917 case SystemZ::ATOMIC_LOADW_NILHi:
7918 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILH, 0, true);
7919 case SystemZ::ATOMIC_LOAD_NRi:
7920 return emitAtomicLoadBinary(MI, MBB, SystemZ::NR, 32, true);
7921 case SystemZ::ATOMIC_LOAD_NILLi:
7922 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILL, 32, true);
7923 case SystemZ::ATOMIC_LOAD_NILHi:
7924 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILH, 32, true);
7925 case SystemZ::ATOMIC_LOAD_NILFi:
7926 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILF, 32, true);
7927 case SystemZ::ATOMIC_LOAD_NGRi:
7928 return emitAtomicLoadBinary(MI, MBB, SystemZ::NGR, 64, true);
7929 case SystemZ::ATOMIC_LOAD_NILL64i:
7930 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILL64, 64, true);
7931 case SystemZ::ATOMIC_LOAD_NILH64i:
7932 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILH64, 64, true);
7933 case SystemZ::ATOMIC_LOAD_NIHL64i:
7934 return emitAtomicLoadBinary(MI, MBB, SystemZ::NIHL64, 64, true);
7935 case SystemZ::ATOMIC_LOAD_NIHH64i:
7936 return emitAtomicLoadBinary(MI, MBB, SystemZ::NIHH64, 64, true);
7937 case SystemZ::ATOMIC_LOAD_NILF64i:
7938 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILF64, 64, true);
7939 case SystemZ::ATOMIC_LOAD_NIHF64i:
7940 return emitAtomicLoadBinary(MI, MBB, SystemZ::NIHF64, 64, true);
7942 case SystemZ::ATOMIC_LOADW_MIN:
7943 return emitAtomicLoadMinMax(MI, MBB, SystemZ::CR,
7944 SystemZ::CCMASK_CMP_LE, 0);
7945 case SystemZ::ATOMIC_LOAD_MIN_32:
7946 return emitAtomicLoadMinMax(MI, MBB, SystemZ::CR,
7947 SystemZ::CCMASK_CMP_LE, 32);
7948 case SystemZ::ATOMIC_LOAD_MIN_64:
7949 return emitAtomicLoadMinMax(MI, MBB, SystemZ::CGR,
7950 SystemZ::CCMASK_CMP_LE, 64);
7952 case SystemZ::ATOMIC_LOADW_MAX:
7953 return emitAtomicLoadMinMax(MI, MBB, SystemZ::CR,
7954 SystemZ::CCMASK_CMP_GE, 0);
7955 case SystemZ::ATOMIC_LOAD_MAX_32:
7956 return emitAtomicLoadMinMax(MI, MBB, SystemZ::CR,
7957 SystemZ::CCMASK_CMP_GE, 32);
7958 case SystemZ::ATOMIC_LOAD_MAX_64:
7959 return emitAtomicLoadMinMax(MI, MBB, SystemZ::CGR,
7960 SystemZ::CCMASK_CMP_GE, 64);
7962 case SystemZ::ATOMIC_LOADW_UMIN:
7963 return emitAtomicLoadMinMax(MI, MBB, SystemZ::CLR,
7964 SystemZ::CCMASK_CMP_LE, 0);
7965 case SystemZ::ATOMIC_LOAD_UMIN_32:
7966 return emitAtomicLoadMinMax(MI, MBB, SystemZ::CLR,
7967 SystemZ::CCMASK_CMP_LE, 32);
7968 case SystemZ::ATOMIC_LOAD_UMIN_64:
7969 return emitAtomicLoadMinMax(MI, MBB, SystemZ::CLGR,
7970 SystemZ::CCMASK_CMP_LE, 64);
7972 case SystemZ::ATOMIC_LOADW_UMAX:
7973 return emitAtomicLoadMinMax(MI, MBB, SystemZ::CLR,
7974 SystemZ::CCMASK_CMP_GE, 0);
7975 case SystemZ::ATOMIC_LOAD_UMAX_32:
7976 return emitAtomicLoadMinMax(MI, MBB, SystemZ::CLR,
7977 SystemZ::CCMASK_CMP_GE, 32);
7978 case SystemZ::ATOMIC_LOAD_UMAX_64:
7979 return emitAtomicLoadMinMax(MI, MBB, SystemZ::CLGR,
7980 SystemZ::CCMASK_CMP_GE, 64);
7982 case SystemZ::ATOMIC_CMP_SWAPW:
7984 case SystemZ::MVCSequence:
7985 case SystemZ::MVCLoop:
7986 return emitMemMemWrapper(MI, MBB, SystemZ::MVC);
7987 case SystemZ::NCSequence:
7988 case SystemZ::NCLoop:
7989 return emitMemMemWrapper(MI, MBB, SystemZ::NC);
7990 case SystemZ::OCSequence:
7991 case SystemZ::OCLoop:
7992 return emitMemMemWrapper(MI, MBB, SystemZ::OC);
7993 case SystemZ::XCSequence:
7994 case SystemZ::XCLoop:
7995 return emitMemMemWrapper(MI, MBB, SystemZ::XC);
7996 case SystemZ::CLCSequence:
7997 case SystemZ::CLCLoop:
7998 return emitMemMemWrapper(MI, MBB, SystemZ::CLC);
7999 case SystemZ::CLSTLoop:
8000 return emitStringWrapper(MI, MBB, SystemZ::CLST);
8001 case SystemZ::MVSTLoop:
8002 return emitStringWrapper(MI, MBB, SystemZ::MVST);
8003 case SystemZ::SRSTLoop:
8004 return emitStringWrapper(MI, MBB, SystemZ::SRST);
8005 case SystemZ::TBEGIN:
8006 return emitTransactionBegin(MI, MBB, SystemZ::TBEGIN, false);
8007 case SystemZ::TBEGIN_nofloat:
8008 return emitTransactionBegin(MI, MBB, SystemZ::TBEGIN, true);
8009 case SystemZ::TBEGINC:
8010 return emitTransactionBegin(MI, MBB, SystemZ::TBEGINC, true);
8011 case SystemZ::LTEBRCompare_VecPseudo:
8012 return emitLoadAndTestCmp0(MI, MBB, SystemZ::LTEBR);
8013 case SystemZ::LTDBRCompare_VecPseudo:
8014 return emitLoadAndTestCmp0(MI, MBB, SystemZ::LTDBR);
8015 case SystemZ::LTXBRCompare_VecPseudo:
8016 return emitLoadAndTestCmp0(MI, MBB, SystemZ::LTXBR);
8032 return &SystemZ::ADDR128BitRegClass;