Lines Matching refs:Mips
15 #include "Mips.h"
53 unsigned Opcode = Mips::Mflo16;
58 unsigned Opcode = Mips::Mfhi16;
76 const TargetRegisterClass *RC = &Mips::CPU16RegsRegClass;
83 BuildMI(MBB, I, DL, TII.get(Mips::LiRxImmX16), V0)
85 BuildMI(MBB, I, DL, TII.get(Mips::AddiuRxPcImmX16), V1)
88 BuildMI(MBB, I, DL, TII.get(Mips::SllX16), V2).addReg(V0).addImm(16);
89 BuildMI(MBB, I, DL, TII.get(Mips::AdduRxRyRz16), GlobalBaseReg)
197 MultOpc = (Opcode == ISD::UMUL_LOHI ? Mips::MultuRxRy16 : Mips::MultRxRy16);
212 MultOpc = (Opcode == ISD::MULHU ? Mips::MultuRxRy16 : Mips::MultRxRy16);