Lines Matching refs:Mips
1 //===-- MipsTargetStreamer.cpp - Mips Target Streamer Methods -------------===//
9 // This file provides Mips specific target streamer methods.
38 return STI->getFeatureBits()[Mips::FeatureMicroMips];
42 : MCTargetStreamer(S), GPReg(Mips::GP), ModuleDirectiveAllowed(true) {
260 emitRRR(Is64Bit ? Mips::DADDu : Mips::ADDu, DstReg, SrcReg, TrgReg, SMLoc(),
268 emitRRI(Mips::DSLL32, DstReg, SrcReg, ShiftAmount - 32, IDLoc, STI);
272 emitRRI(Mips::DSLL, DstReg, SrcReg, ShiftAmount, IDLoc, STI);
278 emitRR(Mips::MOVE16_MM, Mips::ZERO, Mips::ZERO, IDLoc, STI);
280 emitRRI(Mips::SLL, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI);
285 emitRR(Mips::MOVE16_MM, Mips::ZERO, Mips::ZERO, IDLoc, STI);
287 emitRRI(Mips::SLL, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI);
293 emitLoadWithImmOffset(Mips::LW, GPReg, Mips::SP, Offset, GPReg, IDLoc, STI);
323 emitRI(Mips::LUi, ATReg, HiOffset, IDLoc, STI);
324 if (BaseReg != Mips::ZERO)
325 emitRRR(Mips::ADDu, ATReg, ATReg, BaseReg, IDLoc, STI);
359 emitRI(Mips::LUi, TmpReg, HiOffset, IDLoc, STI);
360 if (BaseReg != Mips::ZERO)
361 emitRRR(Mips::ADDu, TmpReg, TmpReg, BaseReg, IDLoc, STI);
808 if (Features[Mips::FeatureMips64r6])
810 else if (Features[Mips::FeatureMips64r2] ||
811 Features[Mips::FeatureMips64r3] ||
812 Features[Mips::FeatureMips64r5])
814 else if (Features[Mips::FeatureMips64])
816 else if (Features[Mips::FeatureMips5])
818 else if (Features[Mips::FeatureMips4])
820 else if (Features[Mips::FeatureMips3])
822 else if (Features[Mips::FeatureMips32r6])
824 else if (Features[Mips::FeatureMips32r2] ||
825 Features[Mips::FeatureMips32r3] ||
826 Features[Mips::FeatureMips32r5])
828 else if (Features[Mips::FeatureMips32])
830 else if (Features[Mips::FeatureMips2])
836 if (Features[Mips::FeatureCnMips])
840 if (Features[Mips::FeatureNaN2008])
906 if (Features[Mips::FeatureGP64Bit]) {
909 } else if (Features[Mips::FeatureMips64r2] || Features[Mips::FeatureMips64])
914 if (!Features[Mips::FeatureNoABICalls])
923 // At the moment we are only emitting .Mips.options (ODK_REGINFO) and
1134 TmpInst.setOpcode(Mips::LUi);
1146 TmpInst.setOpcode(Mips::ADDiu);
1159 TmpInst.setOpcode(Mips::ADDu);
1189 emitStoreWithImmOffset(Mips::SW, GPReg, Mips::SP, Offset, GetATReg, IDLoc,
1210 emitRRR(Mips::OR64, RegOrOffset, GPReg, Mips::ZERO, SMLoc(), &STI);
1213 emitRRI(Mips::SD, GPReg, Mips::SP, RegOrOffset, SMLoc(), &STI);
1226 emitRX(Mips::LUi, GPReg, MCOperand::createExpr(HiExpr), SMLoc(), &STI);
1229 emitRRX(Mips::ADDiu, GPReg, GPReg, MCOperand::createExpr(LoExpr), SMLoc(),
1243 emitRX(Mips::LUi, GPReg, MCOperand::createExpr(HiExpr), SMLoc(), &STI);
1246 emitRRX(Mips::ADDiu, GPReg, GPReg, MCOperand::createExpr(LoExpr), SMLoc(),
1250 emitRRR(Mips::DADDu, GPReg, GPReg, RegNo, SMLoc(), &STI);
1262 Inst.setOpcode(Mips::OR);
1265 Inst.addOperand(MCOperand::createReg(Mips::ZERO));
1267 Inst.setOpcode(Mips::LD);
1269 Inst.addOperand(MCOperand::createReg(Mips::SP));