Lines Matching refs:AVR
15 #include "AVR.h"
28 #define AVR_EXPAND_PSEUDO_NAME "AVR pseudo instruction expansion pass"
33 /// actual AVR instructions.
54 const unsigned SCRATCH_REGISTER = AVR::R0;
56 const unsigned ZERO_REGISTER = AVR::R1;
211 if (Op == AVR::ANDIRdK && ImmVal == 0xff)
215 if (Op == AVR::ORIRdK && ImmVal == 0x0)
259 bool AVRExpandPseudo::expand<AVR::ADDWRdRr>(Block &MBB, BlockIt MBBI) {
260 return expandArith(AVR::ADDRdRr, AVR::ADCRdRr, MBB, MBBI);
264 bool AVRExpandPseudo::expand<AVR::ADCWRdRr>(Block &MBB, BlockIt MBBI) {
265 return expandArith(AVR::ADCRdRr, AVR::ADCRdRr, MBB, MBBI);
269 bool AVRExpandPseudo::expand<AVR::SUBWRdRr>(Block &MBB, BlockIt MBBI) {
270 return expandArith(AVR::SUBRdRr, AVR::SBCRdRr, MBB, MBBI);
274 bool AVRExpandPseudo::expand<AVR::SUBIWRdK>(Block &MBB, BlockIt MBBI) {
283 auto MIBLO = buildMI(MBB, MBBI, AVR::SUBIRdK)
287 auto MIBHI = buildMI(MBB, MBBI, AVR::SBCIRdK)
321 bool AVRExpandPseudo::expand<AVR::SBCWRdRr>(Block &MBB, BlockIt MBBI) {
322 return expandArith(AVR::SBCRdRr, AVR::SBCRdRr, MBB, MBBI);
326 bool AVRExpandPseudo::expand<AVR::SBCIWRdK>(Block &MBB, BlockIt MBBI) {
336 OpLo = AVR::SBCIRdK;
337 OpHi = AVR::SBCIRdK;
364 bool AVRExpandPseudo::expand<AVR::ANDWRdRr>(Block &MBB, BlockIt MBBI) {
365 return expandLogic(AVR::ANDRdRr, MBB, MBBI);
369 bool AVRExpandPseudo::expand<AVR::ANDIWRdK>(Block &MBB, BlockIt MBBI) {
370 return expandLogicImm(AVR::ANDIRdK, MBB, MBBI);
374 bool AVRExpandPseudo::expand<AVR::ORWRdRr>(Block &MBB, BlockIt MBBI) {
375 return expandLogic(AVR::ORRdRr, MBB, MBBI);
379 bool AVRExpandPseudo::expand<AVR::ORIWRdK>(Block &MBB, BlockIt MBBI) {
380 return expandLogicImm(AVR::ORIRdK, MBB, MBBI);
384 bool AVRExpandPseudo::expand<AVR::EORWRdRr>(Block &MBB, BlockIt MBBI) {
385 return expandLogic(AVR::EORRdRr, MBB, MBBI);
389 bool AVRExpandPseudo::expand<AVR::COMWRd>(Block &MBB, BlockIt MBBI) {
396 OpLo = AVR::COMRd;
397 OpHi = AVR::COMRd;
419 bool AVRExpandPseudo::expand<AVR::CPWRdRr>(Block &MBB, BlockIt MBBI) {
427 OpLo = AVR::CPRdRr;
428 OpHi = AVR::CPCRdRr;
452 bool AVRExpandPseudo::expand<AVR::CPCWRdRr>(Block &MBB, BlockIt MBBI) {
460 OpLo = AVR::CPCRdRr;
461 OpHi = AVR::CPCRdRr;
487 bool AVRExpandPseudo::expand<AVR::LDIWRdK>(Block &MBB, BlockIt MBBI) {
492 OpLo = AVR::LDIRdK;
493 OpHi = AVR::LDIRdK;
536 bool AVRExpandPseudo::expand<AVR::LDSWRdK>(Block &MBB, BlockIt MBBI) {
541 OpLo = AVR::LDSRdK;
542 OpHi = AVR::LDSRdK;
580 bool AVRExpandPseudo::expand<AVR::LDWRdPtr>(Block &MBB, BlockIt MBBI) {
587 OpLo = AVR::LDRdPtr;
588 OpHi = AVR::LDDRdPtrQ;
605 buildMI(MBB, MBBI, AVR::PUSHRr).addReg(TmpReg);
615 buildMI(MBB, MBBI, AVR::MOVRdRr).addReg(DstHiReg).addReg(TmpReg);
618 buildMI(MBB, MBBI, AVR::POPRd).addReg(DstLoReg);
629 bool AVRExpandPseudo::expand<AVR::LDWRdPtrPi>(Block &MBB, BlockIt MBBI) {
636 OpLo = AVR::LDRdPtrPi;
637 OpHi = AVR::LDRdPtrPi;
660 bool AVRExpandPseudo::expand<AVR::LDWRdPtrPd>(Block &MBB, BlockIt MBBI) {
667 OpLo = AVR::LDRdPtrPd;
668 OpHi = AVR::LDRdPtrPd;
691 bool AVRExpandPseudo::expand<AVR::LDDWRdPtrQ>(Block &MBB, BlockIt MBBI) {
699 OpLo = AVR::LDDRdPtrQ;
700 OpHi = AVR::LDDRdPtrQ;
722 buildMI(MBB, MBBI, AVR::PUSHRr).addReg(TmpReg);
732 buildMI(MBB, MBBI, AVR::MOVRdRr).addReg(DstHiReg).addReg(TmpReg);
735 buildMI(MBB, MBBI, AVR::POPRd).addReg(DstLoReg);
746 bool AVRExpandPseudo::expand<AVR::LPMWRdZ>(Block &MBB, BlockIt MBBI) {
753 OpLo = AVR::LPMRdZPi;
754 OpHi = AVR::LPMRdZ;
771 buildMI(MBB, MBBI, AVR::PUSHRr).addReg(TmpReg);
780 buildMI(MBB, MBBI, AVR::MOVRdRr).addReg(DstHiReg).addReg(TmpReg);
783 buildMI(MBB, MBBI, AVR::POPRd).addReg(DstLoReg);
794 bool AVRExpandPseudo::expand<AVR::LPMWRdZPi>(Block &MBB, BlockIt MBBI) {
804 buildMI(MBB, MBBI, AVR::INRdA)
809 buildMI(MBB, MBBI, AVR::BCLRs).addImm(7); // CLI
814 buildMI(MBB, MBBI, AVR::OUTARr)
851 unsigned LoadOpcode = (Width == 8) ? AVR::LDRdPtr : AVR::LDWRdPtr;
852 unsigned StoreOpcode = (Width == 8) ? AVR::STPtrRr : AVR::STWPtrRr;
874 (*MBB.getParent(), &AVR::GPR8RegClass);
883 BitVector Available = RS.getRegsAvailable(&AVR::GPR8RegClass);
892 bool AVRExpandPseudo::expand<AVR::AtomicLoad8>(Block &MBB, BlockIt MBBI) {
893 return expandAtomicBinaryOp(AVR::LDRdPtr, MBB, MBBI);
897 bool AVRExpandPseudo::expand<AVR::AtomicLoad16>(Block &MBB, BlockIt MBBI) {
898 return expandAtomicBinaryOp(AVR::LDWRdPtr, MBB, MBBI);
902 bool AVRExpandPseudo::expand<AVR::AtomicStore8>(Block &MBB, BlockIt MBBI) {
903 return expandAtomicBinaryOp(AVR::STPtrRr, MBB, MBBI);
907 bool AVRExpandPseudo::expand<AVR::AtomicStore16>(Block &MBB, BlockIt MBBI) {
908 return expandAtomicBinaryOp(AVR::STWPtrRr, MBB, MBBI);
912 bool AVRExpandPseudo::expand<AVR::AtomicLoadAdd8>(Block &MBB, BlockIt MBBI) {
913 return expandAtomicArithmeticOp(8, AVR::ADDRdRr, MBB, MBBI);
917 bool AVRExpandPseudo::expand<AVR::AtomicLoadAdd16>(Block &MBB, BlockIt MBBI) {
918 return expandAtomicArithmeticOp(16, AVR::ADDWRdRr, MBB, MBBI);
922 bool AVRExpandPseudo::expand<AVR::AtomicLoadSub8>(Block &MBB, BlockIt MBBI) {
923 return expandAtomicArithmeticOp(8, AVR::SUBRdRr, MBB, MBBI);
927 bool AVRExpandPseudo::expand<AVR::AtomicLoadSub16>(Block &MBB, BlockIt MBBI) {
928 return expandAtomicArithmeticOp(16, AVR::SUBWRdRr, MBB, MBBI);
932 bool AVRExpandPseudo::expand<AVR::AtomicLoadAnd8>(Block &MBB, BlockIt MBBI) {
933 return expandAtomicArithmeticOp(8, AVR::ANDRdRr, MBB, MBBI);
937 bool AVRExpandPseudo::expand<AVR::AtomicLoadAnd16>(Block &MBB, BlockIt MBBI) {
938 return expandAtomicArithmeticOp(16, AVR::ANDWRdRr, MBB, MBBI);
942 bool AVRExpandPseudo::expand<AVR::AtomicLoadOr8>(Block &MBB, BlockIt MBBI) {
943 return expandAtomicArithmeticOp(8, AVR::ORRdRr, MBB, MBBI);
947 bool AVRExpandPseudo::expand<AVR::AtomicLoadOr16>(Block &MBB, BlockIt MBBI) {
948 return expandAtomicArithmeticOp(16, AVR::ORWRdRr, MBB, MBBI);
952 bool AVRExpandPseudo::expand<AVR::AtomicLoadXor8>(Block &MBB, BlockIt MBBI) {
953 return expandAtomicArithmeticOp(8, AVR::EORRdRr, MBB, MBBI);
957 bool AVRExpandPseudo::expand<AVR::AtomicLoadXor16>(Block &MBB, BlockIt MBBI) {
958 return expandAtomicArithmeticOp(16, AVR::EORWRdRr, MBB, MBBI);
962 bool AVRExpandPseudo::expand<AVR::AtomicFence>(Block &MBB, BlockIt MBBI) {
963 // On AVR, there is only one core and so atomic fences do nothing.
969 bool AVRExpandPseudo::expand<AVR::STSWKRr>(Block &MBB, BlockIt MBBI) {
974 OpLo = AVR::STSKRr;
975 OpHi = AVR::STSKRr;
1015 bool AVRExpandPseudo::expand<AVR::STWPtrRr>(Block &MBB, BlockIt MBBI) {
1021 OpLo = AVR::STPtrRr;
1022 OpHi = AVR::STDPtrQRr;
1043 bool AVRExpandPseudo::expand<AVR::STWPtrPiRr>(Block &MBB, BlockIt MBBI) {
1051 OpLo = AVR::STPtrPiRr;
1052 OpHi = AVR::STPtrPiRr;
1077 bool AVRExpandPseudo::expand<AVR::STWPtrPdRr>(Block &MBB, BlockIt MBBI) {
1085 OpLo = AVR::STPtrPdRr;
1086 OpHi = AVR::STPtrPdRr;
1111 bool AVRExpandPseudo::expand<AVR::STDWPtrQRr>(Block &MBB, BlockIt MBBI) {
1119 OpLo = AVR::STDPtrQRr;
1120 OpHi = AVR::STDPtrQRr;
1145 bool AVRExpandPseudo::expand<AVR::INWRdA>(Block &MBB, BlockIt MBBI) {
1151 OpLo = AVR::INRdA;
1152 OpHi = AVR::INRdA;
1175 bool AVRExpandPseudo::expand<AVR::OUTWARr>(Block &MBB, BlockIt MBBI) {
1181 OpLo = AVR::OUTARr;
1182 OpHi = AVR::OUTARr;
1206 bool AVRExpandPseudo::expand<AVR::PUSHWRr>(Block &MBB, BlockIt MBBI) {
1212 OpLo = AVR::PUSHRr;
1213 OpHi = AVR::PUSHRr;
1231 bool AVRExpandPseudo::expand<AVR::POPWRd>(Block &MBB, BlockIt MBBI) {
1236 OpLo = AVR::POPRd;
1237 OpHi = AVR::POPRd;
1248 bool AVRExpandPseudo::expand<AVR::ROLBRd>(Block &MBB, BlockIt MBBI) {
1249 // In AVR, the rotate instructions behave quite unintuitively. They rotate
1259 OpShift = AVR::ADDRdRr;
1260 OpCarry = AVR::ADCRdRr;
1285 bool AVRExpandPseudo::expand<AVR::RORBRd>(Block &MBB, BlockIt MBBI) {
1286 // In AVR, the rotate instructions behave quite unintuitively. They rotate
1296 OpShiftOut = AVR::LSRRd;
1297 OpLoad = AVR::LDIRdK;
1298 OpShiftIn = AVR::RORRd;
1299 OpAdd = AVR::ORRdRr;
1335 bool AVRExpandPseudo::expand<AVR::LSLWRd>(Block &MBB, BlockIt MBBI) {
1342 OpLo = AVR::ADDRdRr; // ADD Rd, Rd <==> LSL Rd
1343 OpHi = AVR::ADCRdRr; // ADC Rd, Rd <==> ROL Rd
1368 bool AVRExpandPseudo::expand<AVR::LSRWRd>(Block &MBB, BlockIt MBBI) {
1375 OpLo = AVR::RORRd;
1376 OpHi = AVR::LSRRd;
1399 bool AVRExpandPseudo::expand<AVR::RORWRd>(Block &MBB, BlockIt MBBI) {
1405 bool AVRExpandPseudo::expand<AVR::ROLWRd>(Block &MBB, BlockIt MBBI) {
1411 bool AVRExpandPseudo::expand<AVR::ASRWRd>(Block &MBB, BlockIt MBBI) {
1418 OpLo = AVR::RORRd;
1419 OpHi = AVR::ASRRd;
1441 template <> bool AVRExpandPseudo::expand<AVR::SEXT>(Block &MBB, BlockIt MBBI) {
1465 auto MOV = buildMI(MBB, MBBI, AVR::MOVRdRr)
1475 buildMI(MBB, MBBI, AVR::MOVRdRr)
1480 buildMI(MBB, MBBI, AVR::ADDRdRr) // LSL Rd <==> ADD Rd, Rr
1485 auto SBC = buildMI(MBB, MBBI, AVR::SBCRdRr)
1500 template <> bool AVRExpandPseudo::expand<AVR::ZEXT>(Block &MBB, BlockIt MBBI) {
1519 buildMI(MBB, MBBI, AVR::MOVRdRr)
1524 auto EOR = buildMI(MBB, MBBI, AVR::EORRdRr)
1537 bool AVRExpandPseudo::expand<AVR::SPREAD>(Block &MBB, BlockIt MBBI) {
1543 OpLo = AVR::INRdA;
1544 OpHi = AVR::INRdA;
1564 bool AVRExpandPseudo::expand<AVR::SPWRITE>(Block &MBB, BlockIt MBBI) {
1572 buildMI(MBB, MBBI, AVR::INRdA)
1573 .addReg(AVR::R0, RegState::Define)
1577 buildMI(MBB, MBBI, AVR::BCLRs).addImm(0x07).setMIFlags(Flags);
1579 buildMI(MBB, MBBI, AVR::OUTARr)
1584 buildMI(MBB, MBBI, AVR::OUTARr)
1586 .addReg(AVR::R0, RegState::Kill)
1589 buildMI(MBB, MBBI, AVR::OUTARr)
1607 EXPAND(AVR::ADDWRdRr);
1608 EXPAND(AVR::ADCWRdRr);
1609 EXPAND(AVR::SUBWRdRr);
1610 EXPAND(AVR::SUBIWRdK);
1611 EXPAND(AVR::SBCWRdRr);
1612 EXPAND(AVR::SBCIWRdK);
1613 EXPAND(AVR::ANDWRdRr);
1614 EXPAND(AVR::ANDIWRdK);
1615 EXPAND(AVR::ORWRdRr);
1616 EXPAND(AVR::ORIWRdK);
1617 EXPAND(AVR::EORWRdRr);
1618 EXPAND(AVR::COMWRd);
1619 EXPAND(AVR::CPWRdRr);
1620 EXPAND(AVR::CPCWRdRr);
1621 EXPAND(AVR::LDIWRdK);
1622 EXPAND(AVR::LDSWRdK);
1623 EXPAND(AVR::LDWRdPtr);
1624 EXPAND(AVR::LDWRdPtrPi);
1625 EXPAND(AVR::LDWRdPtrPd);
1626 case AVR::LDDWRdYQ: //:FIXME: remove this once PR13375 gets fixed
1627 EXPAND(AVR::LDDWRdPtrQ);
1628 EXPAND(AVR::LPMWRdZ);
1629 EXPAND(AVR::LPMWRdZPi);
1630 EXPAND(AVR::AtomicLoad8);
1631 EXPAND(AVR::AtomicLoad16);
1632 EXPAND(AVR::AtomicStore8);
1633 EXPAND(AVR::AtomicStore16);
1634 EXPAND(AVR::AtomicLoadAdd8);
1635 EXPAND(AVR::AtomicLoadAdd16);
1636 EXPAND(AVR::AtomicLoadSub8);
1637 EXPAND(AVR::AtomicLoadSub16);
1638 EXPAND(AVR::AtomicLoadAnd8);
1639 EXPAND(AVR::AtomicLoadAnd16);
1640 EXPAND(AVR::AtomicLoadOr8);
1641 EXPAND(AVR::AtomicLoadOr16);
1642 EXPAND(AVR::AtomicLoadXor8);
1643 EXPAND(AVR::AtomicLoadXor16);
1644 EXPAND(AVR::AtomicFence);
1645 EXPAND(AVR::STSWKRr);
1646 EXPAND(AVR::STWPtrRr);
1647 EXPAND(AVR::STWPtrPiRr);
1648 EXPAND(AVR::STWPtrPdRr);
1649 EXPAND(AVR::STDWPtrQRr);
1650 EXPAND(AVR::INWRdA);
1651 EXPAND(AVR::OUTWARr);
1652 EXPAND(AVR::PUSHWRr);
1653 EXPAND(AVR::POPWRd);
1654 EXPAND(AVR::ROLBRd);
1655 EXPAND(AVR::RORBRd);
1656 EXPAND(AVR::LSLWRd);
1657 EXPAND(AVR::LSRWRd);
1658 EXPAND(AVR::RORWRd);
1659 EXPAND(AVR::ROLWRd);
1660 EXPAND(AVR::ASRWRd);
1661 EXPAND(AVR::SEXT);
1662 EXPAND(AVR::ZEXT);
1663 EXPAND(AVR::SPREAD);
1664 EXPAND(AVR::SPWRITE);