Lines Matching refs:newOpc
9561 unsigned newOpc;
9564 case ARM_AM::asr: newOpc = isNarrow ? ARM::tASRrr : ARM::t2ASRrr; break;
9565 case ARM_AM::lsr: newOpc = isNarrow ? ARM::tLSRrr : ARM::t2LSRrr; break;
9566 case ARM_AM::lsl: newOpc = isNarrow ? ARM::tLSLrr : ARM::t2LSLrr; break;
9567 case ARM_AM::ror: newOpc = isNarrow ? ARM::tROR : ARM::t2RORrr; break;
9569 TmpInst.setOpcode(newOpc);
9596 unsigned newOpc;
9610 newOpc = isNarrow ? ARM::tMOVSr : ARM::t2MOVr;
9614 case ARM_AM::asr: newOpc = isNarrow ? ARM::tASRri : ARM::t2ASRri; break;
9615 case ARM_AM::lsr: newOpc = isNarrow ? ARM::tLSRri : ARM::t2LSRri; break;
9616 case ARM_AM::lsl: newOpc = isNarrow ? ARM::tLSLri : ARM::t2LSLri; break;
9617 case ARM_AM::ror: newOpc = ARM::t2RORri; isNarrow = false; break;
9618 case ARM_AM::rrx: isNarrow = false; newOpc = ARM::t2RRX; break;
9622 TmpInst.setOpcode(newOpc);
9628 if (newOpc != ARM::t2RRX && !isMov)
10090 unsigned newOpc;
10095 case ARM::ANDrsi: newOpc = ARM::ANDrr; break;
10096 case ARM::ORRrsi: newOpc = ARM::ORRrr; break;
10097 case ARM::EORrsi: newOpc = ARM::EORrr; break;
10098 case ARM::BICrsi: newOpc = ARM::BICrr; break;
10099 case ARM::SUBrsi: newOpc = ARM::SUBrr; break;
10100 case ARM::ADDrsi: newOpc = ARM::ADDrr; break;
10107 TmpInst.setOpcode(newOpc);