Lines Matching defs:SrcVec
3495 const MachineOperand *SrcVec = TII->getNamedOperand(MI, AMDGPU::OpName::src);
3499 const TargetRegisterClass *VecRC = MRI.getRegClass(SrcVec->getReg());
3506 SrcVec->getReg(),
3517 .add(*SrcVec)
3531 .addReg(SrcVec->getReg(), RegState::Undef, SubReg) // vdst
3534 .addReg(SrcVec->getReg(), RegState::Implicit)
3543 .addReg(SrcVec->getReg())
3559 auto InsPt = loadM0FromVGPR(TII, MBB, MI, SrcVec->getReg(), PhiReg,
6094 SDValue SrcVec = DAG.getNode(ISD::BITCAST, DL, MVT::v2i32,
6097 SDValue SrcHi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, SrcVec,