Lines Matching refs:LiveRegs
51 LivePhysRegs &LiveRegs,
57 LiveRegs.addReg(CSRegs[i]);
63 if (!MRI.isPhysRegUsed(Reg) && LiveRegs.available(MRI, Reg))
68 if (LiveRegs.available(MRI, Reg))
83 LivePhysRegs LiveRegs;
84 LiveRegs.init(*MRI.getTargetRegisterInfo());
86 MRI, LiveRegs, AMDGPU::SReg_32_XM0_XEXECRegClass, true);
92 static void buildPrologSpill(LivePhysRegs &LiveRegs, MachineBasicBlock &MBB,
121 MF->getRegInfo(), LiveRegs, AMDGPU::VGPR_32RegClass);
140 static void buildEpilogReload(LivePhysRegs &LiveRegs, MachineBasicBlock &MBB,
168 MF->getRegInfo(), LiveRegs, AMDGPU::VGPR_32RegClass);
692 LivePhysRegs LiveRegs;
717 if (LiveRegs.empty()) {
718 LiveRegs.init(TRI);
719 LiveRegs.addLiveIns(MBB);
721 LiveRegs.removeReg(FuncInfo->SGPRForFPSaveRestoreCopy);
725 = findScratchNonCalleeSaveRegister(MRI, LiveRegs,
736 buildPrologSpill(LiveRegs, MBB, MBBI, TII, Reg.VGPR,
748 LiveRegs.addReg(ScratchExecCopy);
774 if (LiveRegs.empty()) {
775 LiveRegs.init(TRI);
776 LiveRegs.addLiveIns(MBB);
777 LiveRegs.addReg(FuncInfo->SGPRForFPSaveRestoreCopy);
781 MRI, LiveRegs, AMDGPU::SReg_32_XM0RegClass);
832 LivePhysRegs LiveRegs;
878 if (LiveRegs.empty()) {
879 LiveRegs.init(*ST.getRegisterInfo());
880 LiveRegs.addLiveOuts(MBB);
881 LiveRegs.stepBackward(*MBBI);
885 MRI, LiveRegs, *TRI.getWaveMaskRegClass());
886 LiveRegs.removeReg(ScratchExecCopy);
895 buildEpilogReload(LiveRegs, MBB, MBBI, TII, Reg.VGPR,