Lines Matching defs:Bank
170 // If Bank is not -1 assume Reg:SubReg to belong to that Bank.
171 unsigned getRegBankMask(unsigned Reg, unsigned SubReg, int Bank);
175 // If Reg and Bank provided substitute the Reg with the Bank.
177 unsigned Reg = AMDGPU::NoRegister, int Bank = -1);
196 // Bank is relative to the register and not its subregister component.
213 // Bank. If Bank is -1 does not perform substitution. If Collect is set
217 int Bank = -1, bool Collect = false);
219 // Search for a register in Bank unused within LI.
221 unsigned scavengeReg(LiveInterval& LI, unsigned Bank) const;
248 static Printable printBank(unsigned Bank) {
249 return Printable([Bank](raw_ostream &OS) {
250 OS << ((Bank >= SGPR_BANK_OFFSET) ? Bank - SGPR_BANK_OFFSET : Bank);
296 int Bank) {
324 Mask <<= (Bank == -1) ? Reg % NUM_VGPR_BANKS : unsigned(Bank);
343 Mask <<= (Bank == -1) ? Reg % NUM_SGPR_BANKS
344 : unsigned(Bank - SGPR_BANK_OFFSET);
353 int Bank) {
372 unsigned ShiftedBank = Bank;
374 if (Bank != -1 && R == Reg && Op.getSubReg()) {
376 if (!(LM & 1) && (Bank < NUM_VGPR_BANKS)) {
380 ShiftedBank = (Bank + countTrailingZeros(LM)) % NUM_VGPR_BANKS;
381 } else if (!(LM & 3) && (Bank >= SGPR_BANK_OFFSET)) {
385 ShiftedBank = SGPR_BANK_OFFSET + (Bank - SGPR_BANK_OFFSET +
457 unsigned Bank = findFirstSet(Mask);
464 if (Bank == I)
477 Bank -= SGPR_BANK_OFFSET;
479 if (Bank == I)
570 unsigned Reg, int Bank,
581 unsigned StallCycles = analyzeInst(MI, UsedBanks, Reg, Bank);
591 unsigned Bank) const {
593 unsigned MaxNumRegs = (Bank < NUM_VGPR_BANKS) ? MaxNumVGPRs
595 unsigned MaxReg = MaxNumRegs + (Bank < NUM_VGPR_BANKS ? AMDGPU::VGPR0
603 if (!MRI->isAllocatable(Reg) || getPhysRegBank(Reg) != Bank)
638 BankStall(unsigned b, unsigned s) : Bank(b), Stalls(s) {};
640 unsigned Bank;
645 for (int Bank = 0; Bank < NUM_BANKS; ++Bank) {
646 if (C.FreeBanks & (1 << Bank)) {
647 LLVM_DEBUG(dbgs() << "Trying bank " << printBank(Bank) << '\n');
648 unsigned Stalls = computeStallCycles(C.Reg, C.Reg, Bank);
650 LLVM_DEBUG(dbgs() << "With bank " << printBank(Bank) << " -> "
652 BankStalls.push_back(BankStall((unsigned)Bank, Stalls));
662 unsigned Reg = scavengeReg(LI, BS.Bank);
664 LLVM_DEBUG(dbgs() << "No free registers in bank " << printBank(BS.Bank)
670 << " in bank " << printBank(BS.Bank) << '\n');