Lines Matching refs:f16
152 setLoadExtAction(ISD::EXTLOAD, MVT::f32, MVT::f16, Expand);
165 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f16, Expand);
216 setTruncStoreAction(MVT::f32, MVT::f16, Expand);
224 setTruncStoreAction(MVT::f64, MVT::f16, Expand);
626 (ScalarVT == MVT::f16 && Subtarget->has16BitInsts()));
745 (Subtarget->has16BitInsts() && VT == MVT::f16);
751 (Subtarget->has16BitInsts() && VT == MVT::f16) ||
2512 if (DestVT == MVT::f16)
2523 if (Subtarget->has16BitInsts() && DestVT == MVT::f16) {
2529 DAG.getNode(ISD::FP_ROUND, DL, MVT::f16, IntToFp32, FPRoundFlag);
2549 if (DestVT == MVT::f16)
2562 if (Subtarget->has16BitInsts() && DestVT == MVT::f16) {
2569 DAG.getNode(ISD::FP_ROUND, DL, MVT::f16, IntToFp32, FPRoundFlag);
2625 // f64 -> f16 conversion using round-to-nearest-even rounding mode.
2641 // add the f16 bias (15) to get the biased exponent for the f16 format.
2716 if (Subtarget->has16BitInsts() && SrcVT == MVT::f16) {
2739 if (Subtarget->has16BitInsts() && SrcVT == MVT::f16) {
3848 // f16, but legalization of f16 fneg ends up pulling it out of the source.
3875 assert(!Subtarget->has16BitInsts() && "should only see if f16 is illegal");