Lines Matching refs:AArch64
1 //===-- AArch64AsmBackend.cpp - AArch64 Assembler Backend -----------------===//
44 return AArch64::NumTargetFixupKinds;
50 const static MCFixupKindInfo Infos[AArch64::NumTargetFixupKinds] = {
112 case AArch64::fixup_aarch64_tlsdesc_call:
122 case AArch64::fixup_aarch64_movw:
123 case AArch64::fixup_aarch64_pcrel_branch14:
124 case AArch64::fixup_aarch64_add_imm12:
125 case AArch64::fixup_aarch64_ldst_imm12_scale1:
126 case AArch64::fixup_aarch64_ldst_imm12_scale2:
127 case AArch64::fixup_aarch64_ldst_imm12_scale4:
128 case AArch64::fixup_aarch64_ldst_imm12_scale8:
129 case AArch64::fixup_aarch64_ldst_imm12_scale16:
130 case AArch64::fixup_aarch64_ldr_pcrel_imm19:
131 case AArch64::fixup_aarch64_pcrel_branch19:
134 case AArch64::fixup_aarch64_pcrel_adr_imm21:
135 case AArch64::fixup_aarch64_pcrel_adrp_imm21:
136 case AArch64::fixup_aarch64_pcrel_branch26:
137 case AArch64::fixup_aarch64_pcrel_call26:
173 case AArch64::fixup_aarch64_pcrel_adr_imm21:
177 case AArch64::fixup_aarch64_pcrel_adrp_imm21:
182 case AArch64::fixup_aarch64_ldr_pcrel_imm19:
183 case AArch64::fixup_aarch64_pcrel_branch19:
191 case AArch64::fixup_aarch64_add_imm12:
192 case AArch64::fixup_aarch64_ldst_imm12_scale1:
199 case AArch64::fixup_aarch64_ldst_imm12_scale2:
208 case AArch64::fixup_aarch64_ldst_imm12_scale4:
217 case AArch64::fixup_aarch64_ldst_imm12_scale8:
226 case AArch64::fixup_aarch64_ldst_imm12_scale16:
235 case AArch64::fixup_aarch64_movw: {
308 case AArch64::fixup_aarch64_pcrel_branch14:
316 case AArch64::fixup_aarch64_pcrel_branch26:
317 case AArch64::fixup_aarch64_pcrel_call26:
364 case AArch64::fixup_aarch64_tlsdesc_call:
365 case AArch64::fixup_aarch64_movw:
366 case AArch64::fixup_aarch64_pcrel_branch14:
367 case AArch64::fixup_aarch64_add_imm12:
368 case AArch64::fixup_aarch64_ldst_imm12_scale1:
369 case AArch64::fixup_aarch64_ldst_imm12_scale2:
370 case AArch64::fixup_aarch64_ldst_imm12_scale4:
371 case AArch64::fixup_aarch64_ldst_imm12_scale8:
372 case AArch64::fixup_aarch64_ldst_imm12_scale16:
373 case AArch64::fixup_aarch64_ldr_pcrel_imm19:
374 case AArch64::fixup_aarch64_pcrel_branch19:
375 case AArch64::fixup_aarch64_pcrel_adr_imm21:
376 case AArch64::fixup_aarch64_pcrel_adrp_imm21:
377 case AArch64::fixup_aarch64_pcrel_branch26:
378 case AArch64::fixup_aarch64_pcrel_call26:
447 // FIXME: This isn't correct for AArch64. Just moving the "generic" logic
492 if (Kind == AArch64::fixup_aarch64_pcrel_adrp_imm21)
499 if (Kind == AArch64::fixup_aarch64_ldr_pcrel_imm19 &&
598 if (XReg != AArch64::FP)
601 assert(XReg == AArch64::FP && "Invalid frame pointer!");
617 assert(LRReg == AArch64::LR && FPReg == AArch64::FP &&
653 if (Reg1 == AArch64::X19 && Reg2 == AArch64::X20 &&
656 else if (Reg1 == AArch64::X21 && Reg2 == AArch64::X22 &&
659 else if (Reg1 == AArch64::X23 && Reg2 == AArch64::X24 &&
662 else if (Reg1 == AArch64::X25 && Reg2 == AArch64::X26 &&
665 else if (Reg1 == AArch64::X27 && Reg2 == AArch64::X28 &&
676 if (Reg1 == AArch64::D8 && Reg2 == AArch64::D9 &&
679 else if (Reg1 == AArch64::D10 && Reg2 == AArch64::D11 &&
682 else if (Reg1 == AArch64::D12 && Reg2 == AArch64::D13 &&
685 else if (Reg1 == AArch64::D14 && Reg2 == AArch64::D15)