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  • only in /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/

Lines Matching refs:AArch64

1 //===- AArch64RegisterInfo.cpp - AArch64 Register Information -------------===//
9 // This file contains the AArch64 implementation of the TargetRegisterInfo
39 : AArch64GenRegisterInfo(AArch64::LR), TT(TT) {
92 for (size_t i = 0; i < AArch64::GPR64commonRegClass.getNumRegs(); ++i) {
94 UpdatedCSRs.push_back(AArch64::GPR64commonRegClass.getRegister(i));
106 if (RC == &AArch64::GPR32allRegClass && Idx == AArch64::hsub)
107 return &AArch64::FPR32RegClass;
108 else if (RC == &AArch64::GPR64allRegClass && Idx == AArch64::hsub)
109 return &AArch64::FPR64RegClass;
160 for (size_t i = 0; i < AArch64::GPR64commonRegClass.getNumRegs(); ++i) {
162 for (MCSubRegIterator SubReg(AArch64::GPR64commonRegClass.getRegister(i),
202 markSuperRegs(Reserved, AArch64::WSP);
203 markSuperRegs(Reserved, AArch64::WZR);
206 markSuperRegs(Reserved, AArch64::W29);
208 for (size_t i = 0; i < AArch64::GPR32commonRegClass.getNumRegs(); ++i) {
210 markSuperRegs(Reserved, AArch64::GPR32commonRegClass.getRegister(i));
214 markSuperRegs(Reserved, AArch64::W19);
218 markSuperRegs(Reserved, AArch64::W16);
230 return std::any_of(std::begin(*AArch64::GPR64argRegClass.MC),
231 std::end(*AArch64::GPR64argRegClass.MC),
238 F.getContext().diagnose(DiagnosticInfoUnsupported{F, "AArch64 doesn't support"
248 return PhysReg == AArch64::WZR || PhysReg == AArch64::XZR;
254 return &AArch64::GPR64spRegClass;
259 if (RC == &AArch64::CCRRegClass)
260 return &AArch64::GPR64RegClass; // Only MSR & MRS copy NZCV.
264 unsigned AArch64RegisterInfo::getBaseRegister() const { return AArch64::X19; }
296 return TFI->hasFP(MF) ? AArch64::FP : AArch64::SP;
382 if (TFI->hasFP(MF) && isFrameOffsetLegal(MI, AArch64::FP, FPOffset))
390 if (isFrameOffsetLegal(MI, AArch64::SP, Offset))
418 const MCInstrDesc &MCID = TII->get(AArch64::ADDXri);
487 if (MI.getOpcode() == AArch64::TAGPstack) {
505 MF.getRegInfo().createVirtualRegister(&AArch64::GPR64RegClass);
508 BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(AArch64::LDG), ScratchReg)
516 FrameReg = AArch64::SP;
535 MF.getRegInfo().createVirtualRegister(&AArch64::GPR64RegClass);
547 case AArch64::GPR32RegClassID:
548 case AArch64::GPR32spRegClassID:
549 case AArch64::GPR32allRegClassID:
550 case AArch64::GPR64spRegClassID:
551 case AArch64::GPR64allRegClassID:
552 case AArch64::GPR64RegClassID:
553 case AArch64::GPR32commonRegClassID:
554 case AArch64::GPR64commonRegClassID:
559 case AArch64::FPR8RegClassID:
560 case AArch64::FPR16RegClassID:
561 case AArch64::FPR32RegClassID:
562 case AArch64::FPR64RegClassID:
563 case AArch64::FPR128RegClassID:
566 case AArch64::DDRegClassID:
567 case AArch64::DDDRegClassID:
568 case AArch64::DDDDRegClassID:
569 case AArch64::QQRegClassID:
570 case AArch64::QQQRegClassID:
571 case AArch64::QQQQRegClassID:
574 case AArch64::FPR128_loRegClassID:
583 return AArch64::SP;