Lines Matching refs:AArch64
1 //===- AArch64MacroFusion.cpp - AArch64 Macro Fusion ----------------------===//
9 /// \file This file contains the AArch64 implementation of the DAG scheduling
25 if (SecondMI.getOpcode() != AArch64::Bcc)
33 case AArch64::ADDSWri:
34 case AArch64::ADDSWrr:
35 case AArch64::ADDSXri:
36 case AArch64::ADDSXrr:
37 case AArch64::ANDSWri:
38 case AArch64::ANDSWrr:
39 case AArch64::ANDSXri:
40 case AArch64::ANDSXrr:
41 case AArch64::SUBSWri:
42 case AArch64::SUBSWrr:
43 case AArch64::SUBSXri:
44 case AArch64::SUBSXrr:
45 case AArch64::BICSWrr:
46 case AArch64::BICSXrr:
48 case AArch64::ADDSWrs:
49 case AArch64::ADDSXrs:
50 case AArch64::ANDSWrs:
51 case AArch64::ANDSXrs:
52 case AArch64::SUBSWrs:
53 case AArch64::SUBSXrs:
54 case AArch64::BICSWrs:
55 case AArch64::BICSXrs:
66 if (SecondMI.getOpcode() != AArch64::CBZW &&
67 SecondMI.getOpcode() != AArch64::CBZX &&
68 SecondMI.getOpcode() != AArch64::CBNZW &&
69 SecondMI.getOpcode() != AArch64::CBNZX)
77 case AArch64::ADDWri:
78 case AArch64::ADDWrr:
79 case AArch64::ADDXri:
80 case AArch64::ADDXrr:
81 case AArch64::ANDWri:
82 case AArch64::ANDWrr:
83 case AArch64::ANDXri:
84 case AArch64::ANDXrr:
85 case AArch64::EORWri:
86 case AArch64::EORWrr:
87 case AArch64::EORXri:
88 case AArch64::EORXrr:
89 case AArch64::ORRWri:
90 case AArch64::ORRWrr:
91 case AArch64::ORRXri:
92 case AArch64::ORRXrr:
93 case AArch64::SUBWri:
94 case AArch64::SUBWrr:
95 case AArch64::SUBXri:
96 case AArch64::SUBXrr:
98 case AArch64::ADDWrs:
99 case AArch64::ADDXrs:
100 case AArch64::ANDWrs:
101 case AArch64::ANDXrs:
102 case AArch64::SUBWrs:
103 case AArch64::SUBXrs:
104 case AArch64::BICWrs:
105 case AArch64::BICXrs:
119 case AArch64::AESMCrr:
120 case AArch64::AESMCrrTied:
121 return FirstMI == nullptr || FirstMI->getOpcode() == AArch64::AESErr;
123 case AArch64::AESIMCrr:
124 case AArch64::AESIMCrrTied:
125 return FirstMI == nullptr || FirstMI->getOpcode() == AArch64::AESDrr;
134 if (SecondMI.getOpcode() != AArch64::EORv16i8)
142 case AArch64::AESErr:
143 case AArch64::AESDrr:
144 case AArch64::PMULLv16i8:
145 case AArch64::PMULLv8i8:
146 case AArch64::PMULLv1i64:
147 case AArch64::PMULLv2i64:
160 if ((FirstMI == nullptr || FirstMI->getOpcode() == AArch64::ADRP) &&
161 SecondMI.getOpcode() == AArch64::ADDXri)
165 if ((FirstMI == nullptr || FirstMI->getOpcode() == AArch64::MOVZWi) &&
166 (SecondMI.getOpcode() == AArch64::MOVKWi &&
171 if((FirstMI == nullptr || FirstMI->getOpcode() == AArch64::MOVZXi) &&
172 (SecondMI.getOpcode() == AArch64::MOVKXi &&
178 (FirstMI->getOpcode() == AArch64::MOVKXi &&
180 (SecondMI.getOpcode() == AArch64::MOVKXi &&
191 case AArch64::STRBBui:
192 case AArch64::STRBui:
193 case AArch64::STRDui:
194 case AArch64::STRHHui:
195 case AArch64::STRHui:
196 case AArch64::STRQui:
197 case AArch64::STRSui:
198 case AArch64::STRWui:
199 case AArch64::STRXui:
200 case AArch64::LDRBBui:
201 case AArch64::LDRBui:
202 case AArch64::LDRDui:
203 case AArch64::LDRHHui:
204 case AArch64::LDRHui:
205 case AArch64::LDRQui:
206 case AArch64::LDRSui:
207 case AArch64::LDRWui:
208 case AArch64::LDRXui:
209 case AArch64::LDRSBWui:
210 case AArch64::LDRSBXui:
211 case AArch64::LDRSHWui:
212 case AArch64::LDRSHXui:
213 case AArch64::LDRSWui:
219 case AArch64::ADR:
221 case AArch64::ADRP:
233 if (SecondMI.getOpcode() == AArch64::CSELWr) {
238 if (FirstMI->definesRegister(AArch64::WZR))
240 case AArch64::SUBSWrs:
242 case AArch64::SUBSWrx:
244 case AArch64::SUBSWrr:
245 case AArch64::SUBSWri:
251 if (SecondMI.getOpcode() == AArch64::CSELXr) {
256 if (FirstMI->definesRegister(AArch64::XZR))
258 case AArch64::SUBSXrs:
260 case AArch64::SUBSXrx:
261 case AArch64::SUBSXrx64:
263 case AArch64::SUBSXrr:
264 case AArch64::SUBSXri:
280 case AArch64::ADDWrr:
281 case AArch64::ADDXrr:
282 case AArch64::SUBWrr:
283 case AArch64::SUBXrr:
284 case AArch64::ADDWrs:
285 case AArch64::ADDXrs:
286 case AArch64::SUBWrs:
287 case AArch64::SUBXrs:
289 case AArch64::ANDWrr:
290 case AArch64::ANDXrr:
291 case AArch64::BICWrr:
292 case AArch64::BICXrr:
293 case AArch64::EONWrr:
294 case AArch64::EONXrr:
295 case AArch64::EORWrr:
296 case AArch64::EORXrr:
297 case AArch64::ORNWrr:
298 case AArch64::ORNXrr:
299 case AArch64::ORRWrr:
300 case AArch64::ORRXrr:
301 case AArch64::ANDWrs:
302 case AArch64::ANDXrs:
303 case AArch64::BICWrs:
304 case AArch64::BICXrs:
305 case AArch64::EONWrs:
306 case AArch64::EONXrs:
307 case AArch64::EORWrs:
308 case AArch64::EORXrs:
309 case AArch64::ORNWrs:
310 case AArch64::ORNXrs:
311 case AArch64::ORRWrs:
312 case AArch64::ORRXrs:
319 case AArch64::ADDWrr:
320 case AArch64::ADDXrr:
321 case AArch64::ADDSWrr:
322 case AArch64::ADDSXrr:
323 case AArch64::SUBWrr:
324 case AArch64::SUBXrr:
325 case AArch64::SUBSWrr:
326 case AArch64::SUBSXrr:
328 case AArch64::ADDWrs:
329 case AArch64::ADDXrs:
330 case AArch64::ADDSWrs:
331 case AArch64::ADDSXrs:
332 case AArch64::SUBWrs:
333 case AArch64::SUBXrs:
334 case AArch64::SUBSWrs:
335 case AArch64::SUBSXrs:
341 case AArch64::ADDSWrr:
342 case AArch64::ADDSXrr:
343 case AArch64::SUBSWrr:
344 case AArch64::SUBSXrr:
345 case AArch64::ADDSWrs:
346 case AArch64::ADDSXrs:
347 case AArch64::SUBSWrs:
348 case AArch64::SUBSXrs:
355 case AArch64::ADDWrr:
356 case AArch64::ADDXrr:
357 case AArch64::SUBWrr:
358 case AArch64::SUBXrr:
360 case AArch64::ADDWrs:
361 case AArch64::ADDXrs:
362 case AArch64::SUBWrs:
363 case AArch64::SUBXrs: