Lines Matching refs:LdSt
1981 bool AArch64InstrInfo::getMemOperandWithOffset(const MachineInstr &LdSt,
1985 if (!LdSt.mayLoadOrStore())
1989 return getMemOperandWithOffsetWidth(LdSt, BaseOp, Offset, Width, TRI);
1993 const MachineInstr &LdSt, const MachineOperand *&BaseOp, int64_t &Offset,
1995 assert(LdSt.mayLoadOrStore() && "Expected a memory operation.");
1997 if (LdSt.getNumExplicitOperands() == 3) {
1999 if ((!LdSt.getOperand(1).isReg() && !LdSt.getOperand(1).isFI()) ||
2000 !LdSt.getOperand(2).isImm())
2002 } else if (LdSt.getNumExplicitOperands() == 4) {
2004 if (!LdSt.getOperand(1).isReg() ||
2005 (!LdSt.getOperand(2).isReg() && !LdSt.getOperand(2).isFI()) ||
2006 !LdSt.getOperand(3).isImm())
2017 if (!getMemOpInfo(LdSt.getOpcode(), Scale, Width, Dummy1, Dummy2))
2023 if (LdSt.getNumExplicitOperands() == 3) {
2024 BaseOp = &LdSt.getOperand(1);
2025 Offset = LdSt.getOperand(2).getImm() * Scale;
2027 assert(LdSt.getNumExplicitOperands() == 4 && "invalid number of operands");
2028 BaseOp = &LdSt.getOperand(2);
2029 Offset = LdSt.getOperand(3).getImm() * Scale;
2039 AArch64InstrInfo::getMemOpBaseRegImmOfsOffsetOperand(MachineInstr &LdSt) const {
2040 assert(LdSt.mayLoadOrStore() && "Expected a memory operation.");
2041 MachineOperand &OfsOp = LdSt.getOperand(LdSt.getNumExplicitOperands() - 1);
2365 /// Only called for LdSt for which getMemOperandWithOffset returns true.