Lines Matching refs:Mask
969 uint64_t Mask = ((uint64_t)(-1LL) >> (64 - Size)), OrigMask = Mask;
973 if (Imm == 0 || Imm == Mask ||
974 AArch64_AM::isLogicalImmediate(Imm & Mask, Size))
999 NewImm = (Imm | Ones) & Mask;
1004 if (isShiftedMask_64(NewImm) || isShiftedMask_64(~(NewImm | ~Mask)))
1012 Mask >>= EltSize;
1016 if (((Imm ^ Hi) & (DemandedBits & DemandedBitsHi) & Mask) != 0)
1102 /// Mask are known to be either zero or one and return them Known.
1157 APInt Mask = APInt::getHighBitsSet(BitWidth, BitWidth - 8);
1158 Known.Zero |= Mask;
1161 APInt Mask = APInt::getHighBitsSet(BitWidth, BitWidth - 16);
1162 Known.Zero |= Mask;
2047 uint64_t Mask = MaskCst->getZExtValue();
2048 return (Mask == 0xFF || Mask == 0xFFFF || Mask == 0xFFFFFFFF);
4284 const uint32_t *Mask;
4288 Mask = TRI->getThisReturnPreservedMask(MF, CallConv);
4289 if (!Mask) {
4291 Mask = TRI->getCallPreservedMask(MF, CallConv);
4294 Mask = TRI->getCallPreservedMask(MF, CallConv);
4297 TRI->UpdateCustomCallPreservedMask(MF, &Mask);
4302 assert(Mask && "Missing call preserved mask for calling convention");
4303 Ops.push_back(DAG.getRegisterMask(Mask));
4645 const uint32_t *Mask = TRI->getTLSCallPreservedMask();
4647 TRI->UpdateCustomCallPreservedMask(DAG.getMachineFunction(), &Mask);
4656 DAG.getRegisterMask(Mask), Chain.getValue(1));
5013 uint64_t Mask = LHS.getConstantOperandVal(1);
5015 DAG.getConstant(Log2_64(Mask), dl, MVT::i64),
5029 uint64_t Mask = LHS.getConstantOperandVal(1);
5031 DAG.getConstant(Log2_64(Mask), dl, MVT::i64),
5040 uint64_t Mask = LHS.getValueSizeInBits() - 1;
5042 DAG.getConstant(Mask, dl, MVT::i64), Dest);
5050 uint64_t Mask = LHS.getValueSizeInBits() - 1;
5052 DAG.getConstant(Mask, dl, MVT::i64), Dest);
6698 SmallVector<int, 8> Mask(ShuffleVT.getVectorNumElements(), -1);
6718 int *LaneMask = &Mask[i * ResMultiplier];
6727 if (!isShuffleMaskLegal(Mask, ShuffleVT)) {
6737 ShuffleOps[1], Mask);
6891 /// Mask is e.g., <0, 0, 1, 1> instead of <0, 4, 1, 5>.
6910 /// Mask is e.g., <0, 2, 0, 2> instead of <0, 2, 4, 6>,
6929 /// Mask is e.g., <0, 0, 2, 2> instead of <0, 4, 2, 6>.
6982 static bool isConcatMask(ArrayRef<int> Mask, EVT VT, bool SplitLHS) {
6989 if (Mask[I] != I)
6995 if (Mask[I] != I + SplitLHS * Offset)
7007 ArrayRef<int> Mask = cast<ShuffleVectorSDNode>(Op)->getMask();
7015 if (!isConcatMask(Mask, VT, SplitV0))
8617 const uint32_t *Mask = TRI->getWindowsStackProbePreservedMask();
8619 TRI->UpdateCustomCallPreservedMask(DAG.getMachineFunction(), &Mask);
8627 DAG.getRegisterMask(Mask), Chain.getValue(1));
9317 auto Mask = SVI->getShuffleMask();
9334 if (Mask[IdxI] >= 0) {
9336 Op0, Op1, createSequentialMask(Builder, Mask[IdxI], LaneLen, 0)));
9341 if (Mask[IdxJ * Factor + IdxI] >= 0) {
9342 StartMask = Mask[IdxJ * Factor + IdxI] - IdxJ;
10246 SDValue Mask = N->getOperand(1);
10268 if (isConstantSplatVectorMaskForType(Mask.getNode(), MemVT))
10374 SmallVector<int, 8> Mask(MidVT.getVectorNumElements());
10375 for (size_t i = 0; i < Mask.size(); ++i)
10376 Mask[i] = i * 2;
10381 DAG.getNode(ISD::BITCAST, dl, MidVT, N10), Mask));
10821 static SDValue tryCombineCRC32(unsigned Mask, SDNode *N, SelectionDAG &DAG) {
10827 if (!CMask || CMask->getZExtValue() != Mask)
12268 SDValue Mask = DAG.getVectorShuffle(CCVT, DL, SetCC, SetCC, DUPMask);
12269 Mask = DAG.getNode(ISD::BITCAST, DL,
12270 ResVT.changeVectorElementTypeToInteger(), Mask);
12272 return DAG.getSelect(DL, ResVT, Mask, N->getOperand(1), N->getOperand(2));
13274 ConstantInt* Mask = dyn_cast<ConstantInt>(AndI.getOperand(1));
13275 if (!Mask)
13277 return Mask->getValue().isPowerOf2();