Lines Matching refs:RegState
714 MIB.addReg(AArch64::SP, RegState::Define);
1070 .addReg(AArch64::X15, RegState::Implicit)
1071 .addReg(AArch64::X16, RegState::Implicit | RegState::Define | RegState::Dead)
1072 .addReg(AArch64::X17, RegState::Implicit | RegState::Define | RegState::Dead)
1073 .addReg(AArch64::NZCV, RegState::Implicit | RegState::Define | RegState::Dead)
1083 .addReg(AArch64::X16, RegState::Define)
1094 .addReg(AArch64::X16, RegState::Kill)
1095 .addReg(AArch64::X15, RegState::Implicit | RegState::Define)
1096 .addReg(AArch64::X16, RegState::Implicit | RegState::Define | RegState::Dead)
1097 .addReg(AArch64::X17, RegState::Implicit | RegState::Define | RegState::Dead)
1098 .addReg(AArch64::NZCV, RegState::Implicit | RegState::Define | RegState::Dead)
1109 .addReg(AArch64::SP, RegState::Kill)
1110 .addReg(AArch64::X15, RegState::Kill)
1192 .addReg(scratchSPReg, RegState::Kill)
2103 .addReg(AArch64::X18, RegState::Define)
2336 .addReg(AArch64::X18, RegState::Define)
2337 .addReg(AArch64::LR, RegState::Define)