Lines Matching refs:Src1Reg
2689 unsigned Src1Reg = getRegForValue(Src1Val);
2690 if (!Src1Reg)
2700 Src1Reg = emitLogicalOp_ri(ISD::XOR, MVT::i32, Src1Reg, Src1IsKill, 1);
2703 unsigned ResultReg = fastEmitInst_rr(Opc, &AArch64::GPR32RegClass, Src1Reg,
2819 unsigned Src1Reg = getRegForValue(SI->getTrueValue());
2825 if (!Src1Reg || !Src2Reg)
2829 Src2Reg = fastEmitInst_rri(Opc, RC, Src1Reg, Src1IsKill, Src2Reg,
2833 unsigned ResultReg = fastEmitInst_rri(Opc, RC, Src1Reg, Src1IsKill, Src2Reg,
4666 unsigned Src1Reg = getRegForValue(I->getOperand(1));
4667 if (!Src1Reg)
4674 Src1Reg, /*IsKill=*/false);
4679 Src1Reg, Src1IsKill, Src0Reg,
4744 unsigned Src1Reg = getRegForValue(I->getOperand(1));
4745 if (!Src1Reg)
4749 unsigned ResultReg = emitMul_rr(VT, Src0Reg, Src0IsKill, Src1Reg, Src1IsKill);