Lines Matching refs:AArch64
1 //===---------- AArch64CollectLOH.cpp - AArch64 collect LOH pass --*- C++ -*-=//
100 #include "AArch64.h"
130 #define AARCH64_COLLECT_LOH_NAME "AArch64 Collect Linker Optimization Hint (LOH)"
180 case AArch64::ADRP:
182 case AArch64::ADDXri:
184 case AArch64::LDRXui:
185 case AArch64::LDRWui:
202 case AArch64::STRBBui:
203 case AArch64::STRHHui:
204 case AArch64::STRBui:
205 case AArch64::STRHui:
206 case AArch64::STRWui:
207 case AArch64::STRXui:
208 case AArch64::STRSui:
209 case AArch64::STRDui:
210 case AArch64::STRQui:
226 case AArch64::LDRSBWui:
227 case AArch64::LDRSBXui:
228 case AArch64::LDRSHWui:
229 case AArch64::LDRSHXui:
230 case AArch64::LDRSWui:
231 case AArch64::LDRBui:
232 case AArch64::LDRHui:
233 case AArch64::LDRWui:
234 case AArch64::LDRXui:
235 case AArch64::LDRSui:
236 case AArch64::LDRDui:
237 case AArch64::LDRQui:
247 case AArch64::LDRSWui:
248 case AArch64::LDRWui:
249 case AArch64::LDRXui:
250 case AArch64::LDRSui:
251 case AArch64::LDRDui:
252 case AArch64::LDRQui:
261 static_assert(AArch64::X28 - AArch64::X0 + 3 == N_GPR_REGS, "Number of GPRs");
262 static_assert(AArch64::W30 - AArch64::W0 + 1 == N_GPR_REGS, "Number of GPRs");
263 if (AArch64::X0 <= Reg && Reg <= AArch64::X28)
264 return Reg - AArch64::X0;
265 if (AArch64::W0 <= Reg && Reg <= AArch64::W30)
266 return Reg - AArch64::W0;
269 if (Reg == AArch64::FP)
271 if (Reg == AArch64::LR)
313 } else if (MI.getOpcode() == AArch64::ADDXri) {
317 } else if ((MI.getOpcode() == AArch64::LDRXui ||
318 MI.getOpcode() == AArch64::LDRWui) &&
350 if (MI.getOpcode() == AArch64::ADDXri && canAddBePartOfLOH(MI)) {
363 assert((MI.getOpcode() == AArch64::LDRXui ||
364 MI.getOpcode() == AArch64::LDRWui) &&
468 for (MCPhysReg Reg : AArch64::GPR32RegClass)
470 for (MCPhysReg Reg : AArch64::GPR64RegClass)
506 LLVM_DEBUG(dbgs() << "********** AArch64 Collect LOH **********\n"
528 case AArch64::ADDXri:
529 case AArch64::LDRXui:
530 case AArch64::LDRWui:
543 case AArch64::ADRP: