Lines Matching defs:IR
43 bool ExecuteStage::isAvailable(const InstRef &IR) const {
44 if (Scheduler::Status S = HWS.isAvailable(IR)) {
46 notifyEvent<HWStallEvent>(HWStallEvent(ET, IR));
53 Error ExecuteStage::issueInstruction(InstRef &IR) {
58 HWS.issueInstruction(IR, Used, Pending, Ready);
59 Instruction &IS = *IR.getInstruction();
62 notifyReservedOrReleasedBuffers(IR, /* Reserved */ false);
64 notifyInstructionIssued(IR, Used);
66 notifyInstructionExecuted(IR);
68 if (Error S = moveToTheNextStage(IR))
81 InstRef IR = HWS.select();
82 while (IR) {
83 if (Error Err = issueInstruction(IR))
87 IR = HWS.select();
106 for (InstRef &IR : Executed) {
107 notifyInstructionExecuted(IR);
109 if (Error S = moveToTheNextStage(IR))
113 for (const InstRef &IR : Pending)
114 notifyInstructionPending(IR);
116 for (const InstRef &IR : Ready)
117 notifyInstructionReady(IR);
161 static void verifyInstructionEliminated(const InstRef &IR) {
162 const Instruction &Inst = *IR.getInstruction();
173 Error ExecuteStage::handleInstructionEliminated(InstRef &IR) {
175 verifyInstructionEliminated(IR);
177 notifyInstructionPending(IR);
178 notifyInstructionReady(IR);
179 notifyInstructionIssued(IR, {});
180 IR.getInstruction()->forceExecuted();
181 notifyInstructionExecuted(IR);
182 return moveToTheNextStage(IR);
186 Error ExecuteStage::execute(InstRef &IR) {
187 assert(isAvailable(IR) && "Scheduler is not available!");
191 HWS.sanityCheck(IR);
194 if (IR.getInstruction()->isEliminated())
195 return handleInstructionEliminated(IR);
201 bool IsReadyInstruction = HWS.dispatch(IR);
202 const Instruction &Inst = *IR.getInstruction();
205 notifyReservedOrReleasedBuffers(IR, /* Reserved */ true);
209 notifyInstructionPending(IR);
213 notifyInstructionPending(IR);
216 notifyInstructionReady(IR);
218 // If we cannot issue immediately, the HWS will add IR to its ready queue for
220 if (!HWS.mustIssueImmediately(IR))
223 // Issue IR to the underlying pipelines.
224 return issueInstruction(IR);
227 void ExecuteStage::notifyInstructionExecuted(const InstRef &IR) const {
228 LLVM_DEBUG(dbgs() << "[E] Instruction Executed: #" << IR << '\n');
230 HWInstructionEvent(HWInstructionEvent::Executed, IR));
233 void ExecuteStage::notifyInstructionPending(const InstRef &IR) const {
234 LLVM_DEBUG(dbgs() << "[E] Instruction Pending: #" << IR << '\n');
236 HWInstructionEvent(HWInstructionEvent::Pending, IR));
239 void ExecuteStage::notifyInstructionReady(const InstRef &IR) const {
240 LLVM_DEBUG(dbgs() << "[E] Instruction Ready: #" << IR << '\n');
242 HWInstructionEvent(HWInstructionEvent::Ready, IR));
253 const InstRef &IR,
256 dbgs() << "[E] Instruction Issued: #" << IR << '\n';
269 notifyEvent<HWInstructionEvent>(HWInstructionIssuedEvent(IR, Used));
272 void ExecuteStage::notifyReservedOrReleasedBuffers(const InstRef &IR,
274 uint64_t UsedBuffers = IR.getInstruction()->getDesc().UsedBuffers;
287 Listener->onReservedBuffers(IR, BufferIDs);
292 Listener->onReleasedBuffers(IR, BufferIDs);