Lines Matching refs:Mips
3152 if (Mips::BI__builtin_mips_addu_qb <= BuiltinID &&
3153 BuiltinID <= Mips::BI__builtin_mips_lwx) {
3158 if (Mips::BI__builtin_mips_absq_s_qb <= BuiltinID &&
3159 BuiltinID <= Mips::BI__builtin_mips_subuh_r_qb) {
3165 if (Mips::BI__builtin_msa_add_a_b <= BuiltinID &&
3166 BuiltinID <= Mips::BI__builtin_msa_xori_b) {
3187 case Mips::BI__builtin_mips_wrdsp: i = 1; l = 0; u = 63; break;
3188 case Mips::BI__builtin_mips_rddsp: i = 0; l = 0; u = 63; break;
3189 case Mips::BI__builtin_mips_append: i = 2; l = 0; u = 31; break;
3190 case Mips::BI__builtin_mips_balign: i = 2; l = 0; u = 3; break;
3191 case Mips::BI__builtin_mips_precr_sra_ph_w: i = 2; l = 0; u = 31; break;
3192 case Mips::BI__builtin_mips_precr_sra_r_ph_w: i = 2; l = 0; u = 31; break;
3193 case Mips::BI__builtin_mips_prepend: i = 2; l = 0; u = 31; break;
3197 case Mips::BI__builtin_msa_bclri_b:
3198 case Mips::BI__builtin_msa_bnegi_b:
3199 case Mips::BI__builtin_msa_bseti_b:
3200 case Mips::BI__builtin_msa_sat_s_b:
3201 case Mips::BI__builtin_msa_sat_u_b:
3202 case Mips::BI__builtin_msa_slli_b:
3203 case Mips::BI__builtin_msa_srai_b:
3204 case Mips::BI__builtin_msa_srari_b:
3205 case Mips::BI__builtin_msa_srli_b:
3206 case Mips::BI__builtin_msa_srlri_b: i = 1; l = 0; u = 7; break;
3207 case Mips::BI__builtin_msa_binsli_b:
3208 case Mips::BI__builtin_msa_binsri_b: i = 2; l = 0; u = 7; break;
3210 case Mips::BI__builtin_msa_bclri_h:
3211 case Mips::BI__builtin_msa_bnegi_h:
3212 case Mips::BI__builtin_msa_bseti_h:
3213 case Mips::BI__builtin_msa_sat_s_h:
3214 case Mips::BI__builtin_msa_sat_u_h:
3215 case Mips::BI__builtin_msa_slli_h:
3216 case Mips::BI__builtin_msa_srai_h:
3217 case Mips::BI__builtin_msa_srari_h:
3218 case Mips::BI__builtin_msa_srli_h:
3219 case Mips::BI__builtin_msa_srlri_h: i = 1; l = 0; u = 15; break;
3220 case Mips::BI__builtin_msa_binsli_h:
3221 case Mips::BI__builtin_msa_binsri_h: i = 2; l = 0; u = 15; break;
3225 case Mips::BI__builtin_msa_cfcmsa:
3226 case Mips::BI__builtin_msa_ctcmsa: i = 0; l = 0; u = 31; break;
3227 case Mips::BI__builtin_msa_clei_u_b:
3228 case Mips::BI__builtin_msa_clei_u_h:
3229 case Mips::BI__builtin_msa_clei_u_w:
3230 case Mips::BI__builtin_msa_clei_u_d:
3231 case Mips::BI__builtin_msa_clti_u_b:
3232 case Mips::BI__builtin_msa_clti_u_h:
3233 case Mips::BI__builtin_msa_clti_u_w:
3234 case Mips::BI__builtin_msa_clti_u_d:
3235 case Mips::BI__builtin_msa_maxi_u_b:
3236 case Mips::BI__builtin_msa_maxi_u_h:
3237 case Mips::BI__builtin_msa_maxi_u_w:
3238 case Mips::BI__builtin_msa_maxi_u_d:
3239 case Mips::BI__builtin_msa_mini_u_b:
3240 case Mips::BI__builtin_msa_mini_u_h:
3241 case Mips::BI__builtin_msa_mini_u_w:
3242 case Mips::BI__builtin_msa_mini_u_d:
3243 case Mips::BI__builtin_msa_addvi_b:
3244 case Mips::BI__builtin_msa_addvi_h:
3245 case Mips::BI__builtin_msa_addvi_w:
3246 case Mips::BI__builtin_msa_addvi_d:
3247 case Mips::BI__builtin_msa_bclri_w:
3248 case Mips::BI__builtin_msa_bnegi_w:
3249 case Mips::BI__builtin_msa_bseti_w:
3250 case Mips::BI__builtin_msa_sat_s_w:
3251 case Mips::BI__builtin_msa_sat_u_w:
3252 case Mips::BI__builtin_msa_slli_w:
3253 case Mips::BI__builtin_msa_srai_w:
3254 case Mips::BI__builtin_msa_srari_w:
3255 case Mips::BI__builtin_msa_srli_w:
3256 case Mips::BI__builtin_msa_srlri_w:
3257 case Mips::BI__builtin_msa_subvi_b:
3258 case Mips::BI__builtin_msa_subvi_h:
3259 case Mips::BI__builtin_msa_subvi_w:
3260 case Mips::BI__builtin_msa_subvi_d: i = 1; l = 0; u = 31; break;
3261 case Mips::BI__builtin_msa_binsli_w:
3262 case Mips::BI__builtin_msa_binsri_w: i = 2; l = 0; u = 31; break;
3264 case Mips::BI__builtin_msa_bclri_d:
3265 case Mips::BI__builtin_msa_bnegi_d:
3266 case Mips::BI__builtin_msa_bseti_d:
3267 case Mips::BI__builtin_msa_sat_s_d:
3268 case Mips::BI__builtin_msa_sat_u_d:
3269 case Mips::BI__builtin_msa_slli_d:
3270 case Mips::BI__builtin_msa_srai_d:
3271 case Mips::BI__builtin_msa_srari_d:
3272 case Mips::BI__builtin_msa_srli_d:
3273 case Mips::BI__builtin_msa_srlri_d: i = 1; l = 0; u = 63; break;
3274 case Mips::BI__builtin_msa_binsli_d:
3275 case Mips::BI__builtin_msa_binsri_d: i = 2; l = 0; u = 63; break;
3277 case Mips::BI__builtin_msa_ceqi_b:
3278 case Mips::BI__builtin_msa_ceqi_h:
3279 case Mips::BI__builtin_msa_ceqi_w:
3280 case Mips::BI__builtin_msa_ceqi_d:
3281 case Mips::BI__builtin_msa_clti_s_b:
3282 case Mips::BI__builtin_msa_clti_s_h:
3283 case Mips::BI__builtin_msa_clti_s_w:
3284 case Mips::BI__builtin_msa_clti_s_d:
3285 case Mips::BI__builtin_msa_clei_s_b:
3286 case Mips::BI__builtin_msa_clei_s_h:
3287 case Mips::BI__builtin_msa_clei_s_w:
3288 case Mips::BI__builtin_msa_clei_s_d:
3289 case Mips::BI__builtin_msa_maxi_s_b:
3290 case Mips::BI__builtin_msa_maxi_s_h:
3291 case Mips::BI__builtin_msa_maxi_s_w:
3292 case Mips::BI__builtin_msa_maxi_s_d:
3293 case Mips::BI__builtin_msa_mini_s_b:
3294 case Mips::BI__builtin_msa_mini_s_h:
3295 case Mips::BI__builtin_msa_mini_s_w:
3296 case Mips::BI__builtin_msa_mini_s_d: i = 1; l = -16; u = 15; break;
3298 case Mips::BI__builtin_msa_andi_b:
3299 case Mips::BI__builtin_msa_nori_b:
3300 case Mips::BI__builtin_msa_ori_b:
3301 case Mips::BI__builtin_msa_shf_b:
3302 case Mips::BI__builtin_msa_shf_h:
3303 case Mips::BI__builtin_msa_shf_w:
3304 case Mips::BI__builtin_msa_xori_b: i = 1; l = 0; u = 255; break;
3305 case Mips::BI__builtin_msa_bseli_b:
3306 case Mips::BI__builtin_msa_bmnzi_b:
3307 case Mips::BI__builtin_msa_bmzi_b: i = 2; l = 0; u = 255; break;
3310 case Mips::BI__builtin_msa_copy_s_b:
3311 case Mips::BI__builtin_msa_copy_u_b:
3312 case Mips::BI__builtin_msa_insve_b:
3313 case Mips::BI__builtin_msa_splati_b: i = 1; l = 0; u = 15; break;
3314 case Mips::BI__builtin_msa_sldi_b: i = 2; l = 0; u = 15; break;
3316 case Mips::BI__builtin_msa_copy_s_h:
3317 case Mips::BI__builtin_msa_copy_u_h:
3318 case Mips::BI__builtin_msa_insve_h:
3319 case Mips::BI__builtin_msa_splati_h: i = 1; l = 0; u = 7; break;
3320 case Mips::BI__builtin_msa_sldi_h: i = 2; l = 0; u = 7; break;
3322 case Mips::BI__builtin_msa_copy_s_w:
3323 case Mips::BI__builtin_msa_copy_u_w:
3324 case Mips::BI__builtin_msa_insve_w:
3325 case Mips::BI__builtin_msa_splati_w: i = 1; l = 0; u = 3; break;
3326 case Mips::BI__builtin_msa_sldi_w: i = 2; l = 0; u = 3; break;
3328 case Mips::BI__builtin_msa_copy_s_d:
3329 case Mips::BI__builtin_msa_copy_u_d:
3330 case Mips::BI__builtin_msa_insve_d:
3331 case Mips::BI__builtin_msa_splati_d: i = 1; l = 0; u = 1; break;
3332 case Mips::BI__builtin_msa_sldi_d: i = 2; l = 0; u = 1; break;
3335 case Mips::BI__builtin_msa_ldi_b: i = 0; l = -128; u = 255; break;
3336 case Mips::BI__builtin_msa_ldi_h:
3337 case Mips::BI__builtin_msa_ldi_w:
3338 case Mips::BI__builtin_msa_ldi_d: i = 0; l = -512; u = 511; break;
3339 case Mips::BI__builtin_msa_ld_b: i = 1; l = -512; u = 511; m = 1; break;
3340 case Mips::BI__builtin_msa_ld_h: i = 1; l = -1024; u = 1022; m = 2; break;
3341 case Mips::BI__builtin_msa_ld_w: i = 1; l = -2048; u = 2044; m = 4; break;
3342 case Mips::BI__builtin_msa_ld_d: i = 1; l = -4096; u = 4088; m = 8; break;
3343 case Mips::BI__builtin_msa_st_b: i = 2; l = -512; u = 511; m = 1; break;
3344 case Mips::BI__builtin_msa_st_h: i = 2; l = -1024; u = 1022; m = 2; break;
3345 case Mips::BI__builtin_msa_st_w: i = 2; l = -2048; u = 2044; m = 4; break;
3346 case Mips::BI__builtin_msa_st_d: i = 2; l = -4096; u = 4088; m = 8; break;