Lines Matching refs:GP_REG_FIRST
986 #define DWARF_FRAME_RETURN_COLUMN (GP_REG_FIRST + 31)
993 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, GP_REG_FIRST + 31)
999 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, GP_REG_FIRST + 3)
1316 #define GP_REG_FIRST 0
1318 #define GP_REG_NUM (GP_REG_LAST - GP_REG_FIRST + 1)
1355 #define AT_REGNUM (GP_REG_FIRST + 1)
1371 ((unsigned int) ((int) (REGNO) - GP_REG_FIRST) < GP_REG_NUM)
1438 #define STACK_POINTER_REGNUM (GP_REG_FIRST + 29)
1448 (TARGET_MIPS16 ? GP_REG_FIRST + 17 : GP_REG_FIRST + 30)
1457 #define STATIC_CHAIN_REGNUM (GP_REG_FIRST + 2)
1466 #define MIPS_PROLOGUE_TEMP_REGNUM (GP_REG_FIRST + 3)
1467 #define MIPS_EPILOGUE_TEMP_REGNUM (GP_REG_FIRST + (TARGET_MIPS16 ? 6 : 8))
1478 #define GLOBAL_POINTER_REGNUM (GP_REG_FIRST + 28)
1491 #define PIC_FUNCTION_ADDR_REGNUM (GP_REG_FIRST + 25)
1820 { ARG_POINTER_REGNUM, GP_REG_FIRST + 30}, \
1821 { ARG_POINTER_REGNUM, GP_REG_FIRST + 17}, \
1823 { FRAME_POINTER_REGNUM, GP_REG_FIRST + 30}, \
1824 { FRAME_POINTER_REGNUM, GP_REG_FIRST + 17}}
1869 #define GP_RETURN (GP_REG_FIRST + 2)
1876 #define GP_ARG_FIRST (GP_REG_FIRST + 4)
2038 reg_names[GP_REG_FIRST + 1], reg_names[GP_REG_FIRST + 31]); \
2427 { "$29", 29 + GP_REG_FIRST }, \
2428 { "$30", 30 + GP_REG_FIRST }, \
2429 { "at", 1 + GP_REG_FIRST }, \
2430 { "v0", 2 + GP_REG_FIRST }, \
2431 { "v1", 3 + GP_REG_FIRST }, \
2432 { "a0", 4 + GP_REG_FIRST }, \
2433 { "a1", 5 + GP_REG_FIRST }, \
2434 { "a2", 6 + GP_REG_FIRST }, \
2435 { "a3", 7 + GP_REG_FIRST }, \
2436 { "t0", 8 + GP_REG_FIRST }, \
2437 { "t1", 9 + GP_REG_FIRST }, \
2438 { "t2", 10 + GP_REG_FIRST }, \
2439 { "t3", 11 + GP_REG_FIRST }, \
2440 { "t4", 12 + GP_REG_FIRST }, \
2441 { "t5", 13 + GP_REG_FIRST }, \
2442 { "t6", 14 + GP_REG_FIRST }, \
2443 { "t7", 15 + GP_REG_FIRST }, \
2444 { "s0", 16 + GP_REG_FIRST }, \
2445 { "s1", 17 + GP_REG_FIRST }, \
2446 { "s2", 18 + GP_REG_FIRST }, \
2447 { "s3", 19 + GP_REG_FIRST }, \
2448 { "s4", 20 + GP_REG_FIRST }, \
2449 { "s5", 21 + GP_REG_FIRST }, \
2450 { "s6", 22 + GP_REG_FIRST }, \
2451 { "s7", 23 + GP_REG_FIRST }, \
2452 { "t8", 24 + GP_REG_FIRST }, \
2453 { "t9", 25 + GP_REG_FIRST }, \
2454 { "k0", 26 + GP_REG_FIRST }, \
2455 { "k1", 27 + GP_REG_FIRST }, \
2456 { "gp", 28 + GP_REG_FIRST }, \
2457 { "sp", 29 + GP_REG_FIRST }, \
2458 { "fp", 30 + GP_REG_FIRST }, \
2459 { "ra", 31 + GP_REG_FIRST }, \