Lines Matching refs:ip
98 orrnes ip, r4, xl
99 orrnes ip, r5, yl
100 mvnnes ip, r4, asr #21
101 mvnnes ip, r5, asr #21
127 mov ip, #0x00100000
128 orr xh, ip, xh, lsr #12
135 orr yh, ip, yh, lsr #12
149 @ Shift yh-yl right per r5, add to xh-xl, keep leftover bits into ip.
152 mov ip, yl, lsl lr
161 mov ip, yh, lsl lr
162 orrcs ip, ip, #2 @ 2 not 1, to allow lsr #1 later
166 @ We now have a result in xh-xl-ip.
167 @ Keep absolute value in xh-xl-ip, sign in r5 (the n bit was set above)
170 rsbs ip, ip, #0
184 mov ip, ip, rrx
192 @ Our result is now properly aligned into xh-xl, remaining bits in ip.
193 @ Round with MSB of ip. If halfway between two numbers, round towards
197 cmp ip, #0x80000000
198 moveqs ip, xl, lsr #1
206 movs ip, ip, lsl #1
213 @ No rounding necessary since ip will always be 0 at this point.
257 add ip, r2, #20
259 mov xl, xh, lsl ip
266 2: rsble ip, r2, #32
268 orrle xh, xh, xl, lsr ip
320 mvns ip, r4, asr #21
321 mvnnes ip, r5, asr #21
329 orrs ip, r4, xl
342 movs ip, r4, lsr #21
367 mvns ip, r4, asr #21
370 mvneqs ip, r5, asr #21
462 adr ip, LSYM(f0_ret)
463 stmfd sp!, {r4, r5, ip, lr}
484 adr ip, LSYM(f0_ret)
485 stmfd sp!, {r4, r5, ip, lr}
500 mov ip, al
502 mov xl, ip
505 movs ip, xh, lsr #22
510 movs ip, ip, lsr #3
512 movs ip, ip, lsr #3
514 add r2, r2, ip, lsr #3
517 mov ip, xl, lsl r3
549 mov ip, #0xff
550 orr ip, ip, #0x700
551 ands r4, ip, xh, lsr #20
552 andnes r5, ip, yh, lsr #20
553 teqne r4, ip
554 teqne r5, ip
565 bic xh, xh, ip, lsl #21
566 bic yh, yh, ip, lsl #21
588 mul ip, xl, yl
591 adds ip, ip, fp, lsl #16
594 adds ip, ip, fp, lsl #16
636 umull ip, lr, xl, yl
646 @ The LSBs in ip are only significant for the final rounding.
648 teq ip, #0
668 subs ip, r4, #(254 - 1)
669 cmphi ip, #0x700
685 subs r4, r4, ip, lsr #1
686 rsbgts r5, r4, ip
779 teq r4, ip
780 and r5, ip, yh, lsr #20
781 teqne r5, ip
802 teq r4, ip
806 1: teq r5, ip
840 mov ip, #0xff
841 orr ip, ip, #0x700
842 ands r4, ip, xh, lsr #20
843 andnes r5, ip, yh, lsr #20
844 teqne r4, ip
845 teqne r5, ip
887 mov ip, #0x00080000
894 orrcs xl, xl, ip
901 orrcs xl, xl, ip, lsr #1
908 orrcs xl, xl, ip, lsr #2
915 orrcs xl, xl, ip, lsr #3
925 movs ip, ip, lsr #4
934 mov ip, #0x80000000
943 subs ip, r4, #(254 - 1)
944 cmphi ip, #0x700
948 subs ip, r5, yh
949 subeqs ip, r6, yl
950 moveqs ip, xl, lsr #1
959 adds r4, r4, ip, lsr #1
960 rsbgts r5, r4, ip
977 and r5, ip, yh, lsr #20
978 teq r4, ip
979 teqeq r5, ip
981 teq r4, ip
985 teq r5, ip
990 1: teq r5, ip
1015 @ Note: only r0 (return value) and ip are clobbered here.
1019 mov ip, #-1
1024 mov ip, #1
1030 mov ip, #1 @ how should we specify unordered here?
1032 1: str ip, [sp, #-4]
1035 mov ip, xh, lsl #1
1036 mvns ip, ip, asr #21
1037 mov ip, yh, lsl #1
1038 mvnnes ip, ip, asr #21
1043 2: orrs ip, xl, xh, lsl #1 @ if x == 0.0 or -0.0
1044 orreqs ip, yl, yh, lsl #1 @ and y == 0.0 or -0.0
1067 3: mov ip, xh, lsl #1
1068 mvns ip, ip, asr #21
1070 orrs ip, xl, xh, lsl #12
1072 4: mov ip, yh, lsl #1
1073 mvns ip, ip, asr #21
1075 orrs ip, yl, yh, lsl #12
1090 mov ip, r0
1092 mov r2, ip
1093 mov ip, r1
1095 mov r3, ip
1102 @ registers except ip, lr, and cpsr.
1174 mov ip, xh, lsl #1
1175 mvns ip, ip, asr #21
1177 orrs ip, xl, xh, lsl #12
1179 1: mov ip, yh, lsl #1
1180 mvns ip, ip, asr #21
1182 orrs ip, yl, yh, lsl #12
1281 subcss ip, r3, #(1 << 21)
1282 rsbcss ip, ip, #(254 << 21)
1286 and ip, xh, #0x80000000
1288 orr xl, ip, xl, lsr #29
1307 rsb ip, r2, #32
1308 movs r3, xl, lsl ip
1313 orr xl, xl, r3, lsl ip