usr.sbin/nandsim/nandsim_cfgparse.c

388 create_chips(struct rcfile *f, struct sim_chip **chips, int *cnt)
448 	*chips = chipsptr;
453 destroy_chips(struct sim_chip *chips)
456 	free(chips);
465 	struct sim_chip *chips;
488 	/* Then create chips' configs */
489 	if (create_chips(f, &chips, &chipsectionscnt) != 0) {
498 		destroy_chips(chips);
502 	if (validate_chips(chips, chipsectionscnt, ctrls,
505 		destroy_chips(chips);
516 		destroy_chips(chips);
523 	/* At this stage, both ctrls' and chips' configs should be valid */
540 			destroy_chips(chips);
547 		err = ioctl(fd, NANDSIM_CREATE_CHIP, &chips[i]);
551 				    "created\n", chips[i].num,
552 				    chips[i].ctrl_num);
555 				    chips[i].num, chips[i].ctrl_num);
558 				    chips[i].num, chips[i].ctrl_num);
560 			destroy_chips(chips);
571 	destroy_chips(chips);
762 validate_chips(struct sim_chip *chips, int chipcnt,
769 		if (chips[chipcnt].num >= MAX_CTRL_CS) {
771 			    chips[chipcnt].num);
775 		if (chips[chipcnt].ctrl_num >= MAX_SIM_DEV) {
777 			    chips[chipcnt].ctrl_num);
781 		if (chips[chipcnt].width != 8 &&
782 		    chips[chipcnt].width != 16) {
784 			    chips[chipcnt].width, chips[chipcnt].num);
789 		if (chips[chipcnt].page_size < 512 ||
790 		    (chips[chipcnt].page_size &
791 		    (chips[chipcnt].page_size - 1)) != 0) {
793 			    "\n", chips[chipcnt].page_size,
794 			    chips[chipcnt].num,
795 			    chips[chipcnt].ctrl_num);
801 			if (ctrls[i].num == chips[chipcnt].ctrl_num)
807 			    chips[chipcnt].ctrl_num);
824 			if (chips[chipcnt].oob_size < (unsigned)i) {
827 				    chips[chipcnt].num,
828 				    chips[chipcnt].ctrl_num);
832 			if (chips[chipcnt].oob_size < (unsigned)max) {
835 				    "defined layout!", chips[chipcnt].num,
836 				    chips[chipcnt].ctrl_num);
843 		if ((chips[chipcnt].erase_time < DELAYTIME_MIN ||
844 		    chips[chipcnt].erase_time > DELAYTIME_MAX) &&
845 		    chips[chipcnt].erase_time != 0) {
848 			    chips[chipcnt].num,
849 			    chips[chipcnt].ctrl_num);
853 		if ((chips[chipcnt].prog_time < DELAYTIME_MIN ||
854 		    chips[chipcnt].prog_time > DELAYTIME_MAX) &&
855 		    chips[chipcnt].prog_time != 0) {
858 			    chips[chipcnt].num,
859 			    chips[chipcnt].ctrl_num);
863 		if ((chips[chipcnt].read_time < DELAYTIME_MIN ||
864 		    chips[chipcnt].read_time > DELAYTIME_MAX) &&
865 		    chips[chipcnt].read_time != 0) {
868 			    chips[chipcnt].num,
869 			    chips[chipcnt].ctrl_num);
873 	/* Check if chips attached to the same controller, have same width */
877 			if (chips[j].ctrl_num == i) {
879 					width = chips[j].width;
881 					if (width != chips[j].width) {