Lines Matching defs:outbox

185 				struct mlx4_cmd_mailbox *outbox,
237 MLX4_PUT(outbox->buf, port, QUERY_FUNC_CAP_PHYS_PORT_OFFSET);
241 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_FLAGS0_OFFSET);
247 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_FLAGS1_OFFSET);
251 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_COUNTER_INDEX_OFFSET);
255 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_QP0_TUNNEL);
258 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_QP1_TUNNEL);
261 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_QP0_PROXY);
264 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_QP1_PROXY);
270 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_FLAGS_OFFSET);
273 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_NUM_PORTS_OFFSET);
276 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_PF_BHVR_OFFSET);
279 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_FMR_OFFSET);
282 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_QP_QUOTA_OFFSET);
284 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_QP_QUOTA_OFFSET_DEP);
287 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_SRQ_QUOTA_OFFSET);
289 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_SRQ_QUOTA_OFFSET_DEP);
292 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_CQ_QUOTA_OFFSET);
294 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_CQ_QUOTA_OFFSET_DEP);
297 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_MAX_EQ_OFFSET);
300 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_RESERVED_EQ_OFFSET);
303 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_MPT_QUOTA_OFFSET);
305 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_MPT_QUOTA_OFFSET_DEP);
308 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_MTT_QUOTA_OFFSET);
310 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_MTT_QUOTA_OFFSET_DEP);
313 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_MCG_QUOTA_OFFSET);
314 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_MCG_QUOTA_OFFSET_DEP);
326 u32 *outbox;
343 outbox = mailbox->buf;
346 MLX4_GET(field, outbox, QUERY_FUNC_CAP_FLAGS_OFFSET);
355 MLX4_GET(field, outbox, QUERY_FUNC_CAP_NUM_PORTS_OFFSET);
358 MLX4_GET(size, outbox, QUERY_FUNC_CAP_PF_BHVR_OFFSET);
362 MLX4_GET(size, outbox, QUERY_FUNC_CAP_QP_QUOTA_OFFSET);
365 MLX4_GET(size, outbox, QUERY_FUNC_CAP_SRQ_QUOTA_OFFSET);
368 MLX4_GET(size, outbox, QUERY_FUNC_CAP_CQ_QUOTA_OFFSET);
371 MLX4_GET(size, outbox, QUERY_FUNC_CAP_MPT_QUOTA_OFFSET);
374 MLX4_GET(size, outbox, QUERY_FUNC_CAP_MTT_QUOTA_OFFSET);
377 MLX4_GET(size, outbox, QUERY_FUNC_CAP_MCG_QUOTA_OFFSET);
381 MLX4_GET(size, outbox, QUERY_FUNC_CAP_QP_QUOTA_OFFSET_DEP);
384 MLX4_GET(size, outbox, QUERY_FUNC_CAP_SRQ_QUOTA_OFFSET_DEP);
387 MLX4_GET(size, outbox, QUERY_FUNC_CAP_CQ_QUOTA_OFFSET_DEP);
390 MLX4_GET(size, outbox, QUERY_FUNC_CAP_MPT_QUOTA_OFFSET_DEP);
393 MLX4_GET(size, outbox, QUERY_FUNC_CAP_MTT_QUOTA_OFFSET_DEP);
396 MLX4_GET(size, outbox, QUERY_FUNC_CAP_MCG_QUOTA_OFFSET_DEP);
399 MLX4_GET(size, outbox, QUERY_FUNC_CAP_MAX_EQ_OFFSET);
402 MLX4_GET(size, outbox, QUERY_FUNC_CAP_RESERVED_EQ_OFFSET);
415 MLX4_GET(field, outbox, QUERY_FUNC_CAP_FLAGS1_OFFSET);
428 MLX4_GET(field, outbox, QUERY_FUNC_CAP_FLAGS0_OFFSET);
437 MLX4_GET(field, outbox, QUERY_FUNC_CAP_PHYS_PORT_OFFSET);
444 MLX4_GET(field, outbox, QUERY_FUNC_CAP_FLAGS1_OFFSET);
446 MLX4_GET(field, outbox, QUERY_FUNC_CAP_COUNTER_INDEX_OFFSET);
452 MLX4_GET(size, outbox, QUERY_FUNC_CAP_QP0_TUNNEL);
455 MLX4_GET(size, outbox, QUERY_FUNC_CAP_QP0_PROXY);
458 MLX4_GET(size, outbox, QUERY_FUNC_CAP_QP1_TUNNEL);
461 MLX4_GET(size, outbox, QUERY_FUNC_CAP_QP1_PROXY);
480 u32 *outbox;
569 outbox = mailbox->buf;
576 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_QP_OFFSET);
578 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_QP_OFFSET);
580 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_SRQ_OFFSET);
582 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_SRQ_OFFSET);
584 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_CQ_SZ_OFFSET);
586 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_CQ_OFFSET);
588 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_CQ_OFFSET);
590 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_MPT_OFFSET);
592 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_EQ_OFFSET);
594 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_EQ_OFFSET);
596 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_MTT_OFFSET);
598 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_MRW_SZ_OFFSET);
600 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_MRW_OFFSET);
602 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_MTT_SEG_OFFSET);
604 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_REQ_QP_OFFSET);
606 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_RES_QP_OFFSET);
608 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_GSO_OFFSET);
615 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSS_OFFSET);
626 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_RDMA_OFFSET);
628 MLX4_GET(field, outbox, QUERY_DEV_CAP_ACK_DELAY_OFFSET);
630 MLX4_GET(field, outbox, QUERY_DEV_CAP_VL_PORT_OFFSET);
632 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_MSG_SZ_OFFSET);
634 MLX4_GET(field, outbox, QUERY_DEV_CAP_PORT_FLOWSTATS_COUNTERS_OFFSET);
637 MLX4_GET(field, outbox, QUERY_DEV_CAP_FLOW_STEERING_RANGE_EN_OFFSET);
640 MLX4_GET(field, outbox, QUERY_DEV_CAP_FLOW_STEERING_IPOIB_OFFSET);
644 MLX4_GET(field, outbox, QUERY_DEV_CAP_FLOW_STEERING_MAX_QP_OFFSET);
646 MLX4_GET(stat_rate, outbox, QUERY_DEV_CAP_RATE_SUPPORT_OFFSET);
648 MLX4_GET(field, outbox, QUERY_DEV_CAP_CQ_TS_SUPPORT_OFFSET);
651 MLX4_GET(ext_flags, outbox, QUERY_DEV_CAP_EXT_FLAGS_OFFSET);
652 MLX4_GET(flags, outbox, QUERY_DEV_CAP_FLAGS_OFFSET);
654 MLX4_GET(field, outbox, QUERY_DEV_CAP_SYNC_QP_OFFSET);
656 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_UAR_OFFSET);
658 MLX4_GET(field, outbox, QUERY_DEV_CAP_UAR_SZ_OFFSET);
660 MLX4_GET(field, outbox, QUERY_DEV_CAP_PAGE_SZ_OFFSET);
663 MLX4_GET(field, outbox, QUERY_DEV_CAP_BF_OFFSET);
665 MLX4_GET(field, outbox, QUERY_DEV_CAP_LOG_BF_REG_SZ_OFFSET);
667 MLX4_GET(field, outbox, QUERY_DEV_CAP_LOG_MAX_BF_REGS_PER_PAGE_OFFSET);
678 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_SG_SQ_OFFSET);
680 MLX4_GET(size, outbox, QUERY_DEV_CAP_MAX_DESC_SZ_SQ_OFFSET);
683 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_QP_MCG_OFFSET);
685 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_MCG_OFFSET);
687 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_MCG_OFFSET);
689 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_PD_OFFSET);
691 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_PD_OFFSET);
693 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_XRC_OFFSET);
695 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_XRC_OFFSET);
698 MLX4_GET(size, outbox, QUERY_DEV_CAP_RDMARC_ENTRY_SZ_OFFSET);
700 MLX4_GET(size, outbox, QUERY_DEV_CAP_QPC_ENTRY_SZ_OFFSET);
702 MLX4_GET(size, outbox, QUERY_DEV_CAP_AUX_ENTRY_SZ_OFFSET);
704 MLX4_GET(size, outbox, QUERY_DEV_CAP_ALTC_ENTRY_SZ_OFFSET);
706 MLX4_GET(size, outbox, QUERY_DEV_CAP_EQC_ENTRY_SZ_OFFSET);
708 MLX4_GET(size, outbox, QUERY_DEV_CAP_CQC_ENTRY_SZ_OFFSET);
710 MLX4_GET(size, outbox, QUERY_DEV_CAP_SRQ_ENTRY_SZ_OFFSET);
712 MLX4_GET(size, outbox, QUERY_DEV_CAP_C_MPT_ENTRY_SZ_OFFSET);
714 MLX4_GET(size, outbox, QUERY_DEV_CAP_MTT_ENTRY_SZ_OFFSET);
716 MLX4_GET(size, outbox, QUERY_DEV_CAP_D_MPT_ENTRY_SZ_OFFSET);
719 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_SRQ_SZ_OFFSET);
721 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_QP_SZ_OFFSET);
723 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSZ_SRQ_OFFSET);
725 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_SG_RQ_OFFSET);
727 MLX4_GET(size, outbox, QUERY_DEV_CAP_MAX_DESC_SZ_RQ_OFFSET);
730 MLX4_GET(dev_cap->bmme_flags, outbox,
732 MLX4_GET(dev_cap->reserved_lkey, outbox,
734 MLX4_GET(field32, outbox, QUERY_DEV_CAP_ETS_CFG_OFFSET);
744 MLX4_GET(dev_cap->max_icm_sz, outbox,
747 MLX4_GET(dev_cap->max_basic_counters, outbox,
752 MLX4_GET(dev_cap->max_extended_counters, outbox,
755 MLX4_GET(field32, outbox, QUERY_DEV_CAP_EXT_2_FLAGS_OFFSET);
767 MLX4_GET(field, outbox, QUERY_DEV_CAP_VL_PORT_OFFSET);
769 MLX4_GET(field, outbox, QUERY_DEV_CAP_MTU_WIDTH_OFFSET);
772 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_GID_OFFSET);
774 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_PKEY_OFFSET);
796 MLX4_GET(field, outbox, QUERY_PORT_SUPPORTED_TYPE_OFFSET);
800 MLX4_GET(field, outbox, QUERY_PORT_MTU_OFFSET);
802 MLX4_GET(field, outbox, QUERY_PORT_WIDTH_OFFSET);
804 MLX4_GET(field, outbox, QUERY_PORT_MAX_GID_PKEY_OFFSET);
807 MLX4_GET(field, outbox, QUERY_PORT_MAX_VL_OFFSET);
809 MLX4_GET(field, outbox, QUERY_PORT_MAX_MACVLAN_OFFSET);
812 MLX4_GET(dev_cap->eth_mtu[i], outbox, QUERY_PORT_ETH_MTU_OFFSET);
813 MLX4_GET(dev_cap->def_mac[i], outbox, QUERY_PORT_MAC_OFFSET);
814 MLX4_GET(field32, outbox, QUERY_PORT_TRANS_VENDOR_OFFSET);
817 MLX4_GET(dev_cap->wavelength[i], outbox, QUERY_PORT_WAVELENGTH_OFFSET);
818 MLX4_GET(dev_cap->trans_code[i], outbox, QUERY_PORT_TRANS_CODE_OFFSET);
874 struct mlx4_cmd_mailbox *outbox,
881 err = mlx4_cmd_box(dev, 0, outbox->dma, 0, 0, MLX4_CMD_QUERY_DEV_CAP,
887 MLX4_GET(flags, outbox->buf, QUERY_DEV_CAP_EXT_FLAGS_OFFSET);
889 MLX4_PUT(outbox->buf, flags, QUERY_DEV_CAP_EXT_FLAGS_OFFSET);
892 MLX4_GET(field, outbox->buf, QUERY_DEV_CAP_BF_OFFSET);
894 MLX4_PUT(outbox->buf, field, QUERY_DEV_CAP_BF_OFFSET);
898 MLX4_GET(field, outbox->buf,
901 MLX4_PUT(outbox->buf, field,
910 struct mlx4_cmd_mailbox *outbox,
925 err = mlx4_cmd_box(dev, 0, outbox->dma, vhcr->in_modifier, 0,
932 MLX4_PUT(outbox->buf, def_mac, QUERY_PORT_MAC_OFFSET);
935 MLX4_GET(port_type, outbox->buf,
949 MLX4_PUT(outbox->buf, port_type,
956 MLX4_PUT(outbox->buf, short_field,
960 MLX4_PUT(outbox->buf, short_field,
971 u32 *outbox;
985 outbox = mailbox->buf;
987 MLX4_GET(field, outbox, QUERY_PORT_CUR_MAX_GID_OFFSET);
990 MLX4_GET(field, outbox, QUERY_PORT_CUR_MAX_PKEY_OFFSET);
1104 u32 *outbox;
1132 outbox = mailbox->buf;
1139 MLX4_GET(fw_ver, outbox, QUERY_FW_VER_OFFSET);
1148 MLX4_GET(lg, outbox, QUERY_FW_PPF_ID);
1155 MLX4_GET(cmd_if_rev, outbox, QUERY_FW_CMD_IF_REV_OFFSET);
1174 MLX4_GET(lg, outbox, QUERY_FW_MAX_CMD_OFFSET);
1183 MLX4_GET(fw->catas_offset, outbox, QUERY_FW_ERR_START_OFFSET);
1184 MLX4_GET(fw->catas_size, outbox, QUERY_FW_ERR_SIZE_OFFSET);
1185 MLX4_GET(fw->catas_bar, outbox, QUERY_FW_ERR_BAR_OFFSET);
1191 MLX4_GET(fw->fw_pages, outbox, QUERY_FW_SIZE_OFFSET);
1192 MLX4_GET(fw->clr_int_base, outbox, QUERY_FW_CLR_INT_BASE_OFFSET);
1193 MLX4_GET(fw->clr_int_bar, outbox, QUERY_FW_CLR_INT_BAR_OFFSET);
1196 MLX4_GET(fw->comm_base, outbox, QUERY_FW_COMM_BASE_OFFSET);
1197 MLX4_GET(fw->comm_bar, outbox, QUERY_FW_COMM_BAR_OFFSET);
1203 MLX4_GET(fw->clock_offset, outbox, QUERY_FW_CLOCK_OFFSET);
1204 MLX4_GET(fw->clock_bar, outbox, QUERY_FW_CLOCK_BAR);
1228 struct mlx4_cmd_mailbox *outbox,
1234 outbuf = outbox->buf;
1235 err = mlx4_cmd_box(dev, 0, outbox->dma, 0, 0, MLX4_CMD_QUERY_FW,
1287 u32 *outbox;
1298 outbox = mailbox->buf;
1305 MLX4_GET(adapter->inta_pin, outbox, QUERY_ADAPTER_INTA_PIN_OFFSET);
1307 adapter->vsd_vendor_id = be16_to_cpup((u16 *)outbox +
1310 get_board_id(outbox + QUERY_ADAPTER_VSD_OFFSET / 4,
1522 __be32 *outbox;
1534 outbox = mailbox->buf;
1543 MLX4_GET(param->global_caps, outbox, QUERY_HCA_GLOBAL_CAPS_OFFSET);
1544 MLX4_GET(param->hca_core_clock, outbox, QUERY_HCA_CORE_CLOCK_OFFSET);
1548 MLX4_GET(param->qpc_base, outbox, INIT_HCA_QPC_BASE_OFFSET);
1549 MLX4_GET(param->log_num_qps, outbox, INIT_HCA_LOG_QP_OFFSET);
1550 MLX4_GET(param->srqc_base, outbox, INIT_HCA_SRQC_BASE_OFFSET);
1551 MLX4_GET(param->log_num_srqs, outbox, INIT_HCA_LOG_SRQ_OFFSET);
1552 MLX4_GET(param->cqc_base, outbox, INIT_HCA_CQC_BASE_OFFSET);
1553 MLX4_GET(param->log_num_cqs, outbox, INIT_HCA_LOG_CQ_OFFSET);
1554 MLX4_GET(param->altc_base, outbox, INIT_HCA_ALTC_BASE_OFFSET);
1555 MLX4_GET(param->auxc_base, outbox, INIT_HCA_AUXC_BASE_OFFSET);
1556 MLX4_GET(param->eqc_base, outbox, INIT_HCA_EQC_BASE_OFFSET);
1557 MLX4_GET(param->log_num_eqs, outbox, INIT_HCA_LOG_EQ_OFFSET);
1558 MLX4_GET(param->rdmarc_base, outbox, INIT_HCA_RDMARC_BASE_OFFSET);
1559 MLX4_GET(param->log_rd_per_qp, outbox, INIT_HCA_LOG_RD_OFFSET);
1561 MLX4_GET(dword_field, outbox, INIT_HCA_FLAGS_OFFSET);
1565 MLX4_GET(byte_field, outbox, INIT_HCA_UC_STEERING_OFFSET);
1573 MLX4_GET(param->mc_base, outbox, INIT_HCA_FS_BASE_OFFSET);
1574 MLX4_GET(param->log_mc_entry_sz, outbox,
1576 MLX4_GET(param->log_mc_table_sz, outbox,
1579 MLX4_GET(param->mc_base, outbox, INIT_HCA_MC_BASE_OFFSET);
1580 MLX4_GET(param->log_mc_entry_sz, outbox,
1582 MLX4_GET(param->log_mc_hash_sz, outbox,
1584 MLX4_GET(param->log_mc_table_sz, outbox,
1589 MLX4_GET(byte_field, outbox, INIT_HCA_EQE_CQE_OFFSETS);
1597 MLX4_GET(param->dmpt_base, outbox, INIT_HCA_DMPT_BASE_OFFSET);
1598 MLX4_GET(mw_enable, outbox, INIT_HCA_TPT_MW_OFFSET);
1601 MLX4_GET(param->log_mpt_sz, outbox, INIT_HCA_LOG_MPT_SZ_OFFSET);
1602 MLX4_GET(param->mtt_base, outbox, INIT_HCA_MTT_BASE_OFFSET);
1603 MLX4_GET(param->cmpt_base, outbox, INIT_HCA_CMPT_BASE_OFFSET);
1607 MLX4_GET(param->uar_page_sz, outbox, INIT_HCA_UAR_PAGE_SZ_OFFSET);
1608 MLX4_GET(param->log_uar_sz, outbox, INIT_HCA_LOG_UAR_SZ_OFFSET);
1632 struct mlx4_cmd_mailbox *outbox,
1726 struct mlx4_cmd_mailbox *outbox,
1806 u32 *outbox;
1813 outbox = mailbox->buf;
1827 MLX4_GET(counter_out[i], outbox, in_offset[i]);
1839 struct mlx4_cmd_mailbox *outbox,
1877 u32 *outbox;
1899 outbox = mailbox->buf;
1909 MLX4_GET(modifier, outbox, GET_OP_REQ_MODIFIER_OFFSET);
1910 MLX4_GET(token, outbox, GET_OP_REQ_TOKEN_OFFSET);
1911 MLX4_GET(type, outbox, GET_OP_REQ_TYPE_OFFSET);
1923 mgm = (struct mlx4_mgm *) ((u8 *) (outbox) + GET_OP_REQ_DATA_OFFSET);
1950 memset(outbox, 0, 0xffc);