Lines Matching defs:rx_cfg
809 uint32_t rx_cfg;
812 rx_cfg = nlm_read_nae_reg(nae_base, NAE_RX_CONFIG);
813 rx_cfg &= ~(0x3 << 1); /* reset max message size */
814 rx_cfg &= ~(0xff << 4); /* clear freein desc cluster size */
815 rx_cfg &= ~(0x3f << 24); /* reset rx status mask */ /*XXX: why not 7f */
817 rx_cfg |= 1; /* rx enable */
818 rx_cfg |= (0x0 << 1); /* max message size */
819 rx_cfg |= (0x43 & 0x7f) << 24; /* rx status mask */
820 rx_cfg |= ((desc_size / 64) & 0xff) << 4; /* freein desc cluster size */
821 nlm_write_nae_reg(nae_base, NAE_RX_CONFIG, rx_cfg);