mips/cavium/octopci.c

70 	unsigned sc_domain;
142 		sc->sc_domain = device_get_unit(dev);
144 		error = cvmx_pcie_rc_initialize(sc->sc_domain);
157 		sc->sc_io_base = CVMX_ADD_IO_SEG(cvmx_pcie_get_io_base_address(sc->sc_domain));
160 		sc->sc_mem1_base = CVMX_ADD_IO_SEG(cvmx_pcie_get_mem_base_address(sc->sc_domain));
165 		sc->sc_domain = 0;
222 		*result = sc->sc_domain;
350 			return (cvmx_pcie_config_read32(sc->sc_domain, bus, slot, func, reg));
352 			return (cvmx_pcie_config_read16(sc->sc_domain, bus, slot, func, reg));
354 			return (cvmx_pcie_config_read8(sc->sc_domain, bus, slot, func, reg));
389 			cvmx_pcie_config_write32(sc->sc_domain, bus, slot, func, reg, data);
392 			cvmx_pcie_config_write16(sc->sc_domain, bus, slot, func, reg, data);
395 			cvmx_pcie_config_write8(sc->sc_domain, bus, slot, func, reg, data);