Lines Matching refs:ALT5
23 #define ALT5 0x5
63 #define VF610_PAD_PTA16__SAI2_TX_BCLK 0x018 0x370 ALT5 0x0
71 #define VF610_PAD_PTA17__USB0_SOF_PULSE 0x01C 0x000 ALT5 0x0
79 #define VF610_PAD_PTA18__SAI2_TX_DATA 0x020 0x000 ALT5 0x0
87 #define VF610_PAD_PTA19__SAI2_TX_SYNC 0x024 0x000 ALT5 0x0
97 #define VF610_PAD_PTA21__SAI2_RX_BCLK 0x02C 0x364 ALT5 0x0
102 #define VF610_PAD_PTA22__SAI2_RX_DATA 0x030 0x368 ALT5 0x0
107 #define VF610_PAD_PTA23__SAI2_RX_SYNC 0x034 0x36C ALT5 0x0
113 #define VF610_PAD_PTA24__ESDHC1_CLK 0x038 0x000 ALT5 0x0
119 #define VF610_PAD_PTA25__ESDHC1_CMD 0x03C 0x000 ALT5 0x0
124 #define VF610_PAD_PTA26__ESDHC1_DAT0 0x040 0x000 ALT5 0x0
129 #define VF610_PAD_PTA27__ESDHC1_DAT1 0x044 0x000 ALT5 0x0
136 #define VF610_PAD_PTA28__ESDHC1_DATA2 0x048 0x000 ALT5 0x0
143 #define VF610_PAD_PTA29__ESDHC1_DAT3 0x04C 0x000 ALT5 0x0
150 #define VF610_PAD_PTA30__I2C3_SCL 0x050 0x000 ALT5 0x0
157 #define VF610_PAD_PTA31__I2C3_SDA 0x054 0x000 ALT5 0x0
164 #define VF610_PAD_PTB0__SAI2_RX_BCLK 0x058 0x364 ALT5 0x1
172 #define VF610_PAD_PTB1__SAI2_RX_DATA 0x05C 0x368 ALT5 0x1
180 #define VF610_PAD_PTB2__SAI2_RX_SYNC 0x060 0x36C ALT5 0x1
195 #define VF610_PAD_PTB4__VIU_FID 0x068 0x3A8 ALT5 0x0
203 #define VF610_PAD_PTB5__VIU_DE 0x06C 0x3A4 ALT5 0x0
210 #define VF610_PAD_PTB6__FB_CLKOUT 0x070 0x000 ALT5 0x0
223 #define VF610_PAD_PTB8__VIU_DE 0x078 0x3A4 ALT5 0x1
232 #define VF610_PAD_PTB10__VIU_DE 0x080 0x3A4 ALT5 0x2
238 #define VF610_PAD_PTB11__SNVS_ALARM_OUT_B 0x084 0x000 ALT5 0x0
245 #define VF610_PAD_PTB12__FB_AD1 0x088 0x000 ALT5 0x0
252 #define VF610_PAD_PTB13__FB_AD0 0x08C 0x000 ALT5 0x0
291 #define VF610_PAD_PTB22__VIU_FID 0x0B0 0x3A8 ALT5 0x1
297 #define VF610_PAD_PTC0__ESDHC0_CLK 0x0B4 0x000 ALT5 0x0
305 #define VF610_PAD_PTC1__ESDHC0_CMD 0x0B8 0x000 ALT5 0x0
312 #define VF610_PAD_PTC2__ESDHC0_DAT0 0x0BC 0x000 ALT5 0x0
319 #define VF610_PAD_PTC3__ESDHC0_DAT1 0x0C0 0x000 ALT5 0x0
327 #define VF610_PAD_PTC4__ESDHC0_DAT2 0x0C4 0x000 ALT5 0x0
335 #define VF610_PAD_PTC5__ESDHC0_DAT3 0x0C8 0x000 ALT5 0x0
342 #define VF610_PAD_PTC6__ESDHC0_WP 0x0CC 0x000 ALT5 0x0
374 #define VF610_PAD_PTC12__SAI2_TX_BCLK 0x0E4 0x370 ALT5 0x1
379 #define VF610_PAD_PTC13__SAI2_RX_BCLK 0x0E8 0x364 ALT5 0x2
385 #define VF610_PAD_PTC14__SAI2_RX_DATA 0x0EC 0x368 ALT5 0x2
392 #define VF610_PAD_PTC15__SAI2_TX_DATA 0x0F0 0x000 ALT5 0x0
399 #define VF610_PAD_PTC16__SAI2_RX_SYNC 0x0F4 0x36C ALT5 0x2
406 #define VF610_PAD_PTC17__SAI2_TX_SYNC 0x0F8 0x374 ALT5 0x1
413 #define VF610_PAD_PTD31__DSPI2_CS1 0x0FC 0x000 ALT5 0x0
419 #define VF610_PAD_PTD30__DSPI2_CS0 0x100 0x000 ALT5 0x0
425 #define VF610_PAD_PTD29__DSPI2_SIN 0x104 0x000 ALT5 0x0
432 #define VF610_PAD_PTD28__DSPI2_SOUT 0x108 0x000 ALT5 0x0
439 #define VF610_PAD_PTD27__DSPI2_SCK 0x10C 0x000 ALT5 0x0
445 #define VF610_PAD_PTD26__ESDHC1_WP 0x110 0x000 ALT5 0x0
462 #define VF610_PAD_PTD23__ESDHC0_DAT4 0x11C 0x000 ALT5 0x0
470 #define VF610_PAD_PTD22__ESDHC0_DAT5 0x120 0x000 ALT5 0x0
477 #define VF610_PAD_PTD21__ESDHC0_DAT6 0x124 0x000 ALT5 0x0
484 #define VF610_PAD_PTD20__ESDHC0_DAT7 0x128 0x000 ALT5 0x0
492 #define VF610_PAD_PTD19__FTM2_QD_PHA 0x12C 0x000 ALT5 0x0
499 #define VF610_PAD_PTD18__FTM2_QD_PHB 0x130 0x000 ALT5 0x0
517 #define VF610_PAD_PTD0__SPDIF_EXTCLK 0x13C 0x000 ALT5 0x0
523 #define VF610_PAD_PTD1__SPDIF_IN1 0x140 0x000 ALT5 0x0
530 #define VF610_PAD_PTD2__SPDIF_OUT1 0x144 0x000 ALT5 0x0
537 #define VF610_PAD_PTD3__SPDIF_PLOCK 0x148 0x000 ALT5 0x0
543 #define VF610_PAD_PTD4__SPDIF_SRCLK 0x14C 0x000 ALT5 0x0
597 #define VF610_PAD_PTB23__FB_TS_B 0x174 0x000 ALT5 0x0
605 #define VF610_PAD_PTB24__NF_WE_B 0x178 0x000 ALT5 0x0
613 #define VF610_PAD_PTB25__NF_CE0_B 0x17C 0x000 ALT5 0x0
620 #define VF610_PAD_PTB26__NF_CE1_B 0x180 0x000 ALT5 0x0
626 #define VF610_PAD_PTB27__FB_MUXED_TBST_B 0x184 0x000 ALT5 0x0
639 #define VF610_PAD_PTC26__NF_RB_B 0x18C 0x000 ALT5 0x0
646 #define VF610_PAD_PTC27__FB_CS3_B 0x190 0x000 ALT5 0x0
654 #define VF610_PAD_PTC28__FB_CS2_B 0x194 0x000 ALT5 0x0
662 #define VF610_PAD_PTC29__FB_MUXED_TSIZE1 0x198 0x000 ALT5 0x0
669 #define VF610_PAD_PTC30__FB_TSIZ0 0x19C 0x000 ALT5 0x0
767 #define VF610_PAD_PTE19__I2C0_SCL 0x1F0 0x33C ALT5 0x3
772 #define VF610_PAD_PTE20__I2C0_SDA 0x1F4 0x340 ALT5 0x3
800 #define VF610_PAD_PTE27__I2C1_SCL 0x210 0x344 ALT5 0x3
805 #define VF610_PAD_PTE28__I2C1_SDA 0x214 0x348 ALT5 0x3