Lines Matching defs:tim_intr_config
1439 * @tim_intr_config: tim intr configuration information
1448 __hal_device_tim_intr_config_check(vxge_hal_tim_intr_config_t *tim_intr_config)
1450 if ((tim_intr_config->intr_enable != VXGE_HAL_TIM_INTR_ENABLE) &&
1451 (tim_intr_config->intr_enable != VXGE_HAL_TIM_INTR_DISABLE))
1454 if ((tim_intr_config->btimer_val >
1456 (tim_intr_config->btimer_val !=
1460 if ((tim_intr_config->timer_ac_en !=
1462 (tim_intr_config->timer_ac_en !=
1464 (tim_intr_config->timer_ac_en !=
1468 if ((tim_intr_config->timer_ci_en !=
1470 (tim_intr_config->timer_ci_en !=
1472 (tim_intr_config->timer_ci_en !=
1476 if ((tim_intr_config->timer_ri_en !=
1478 (tim_intr_config->timer_ri_en !=
1480 (tim_intr_config->timer_ri_en !=
1484 if ((tim_intr_config->rtimer_event_sf >
1486 (tim_intr_config->rtimer_event_sf !=
1490 if ((tim_intr_config->rtimer_val >
1492 (tim_intr_config->rtimer_val !=
1496 if ((((tim_intr_config->util_sel > 19) &&
1497 (tim_intr_config->util_sel < 32)) ||
1498 ((tim_intr_config->util_sel > 48) &&
1499 (tim_intr_config->util_sel < 63))) &&
1500 (tim_intr_config->util_sel !=
1504 if ((tim_intr_config->ltimer_val >
1506 (tim_intr_config->ltimer_val !=
1510 if ((tim_intr_config->txfrm_cnt_en !=
1512 (tim_intr_config->txfrm_cnt_en !=
1514 (tim_intr_config->txfrm_cnt_en !=
1518 if ((tim_intr_config->txd_cnt_en !=
1520 (tim_intr_config->txd_cnt_en !=
1522 (tim_intr_config->txd_cnt_en !=
1526 if ((tim_intr_config->urange_a >
1528 (tim_intr_config->urange_a !=
1532 if ((tim_intr_config->uec_a >
1534 (tim_intr_config->uec_a !=
1538 if ((tim_intr_config->urange_b >
1540 (tim_intr_config->urange_b !=
1544 if ((tim_intr_config->uec_b >
1546 (tim_intr_config->uec_b !=
1550 if ((tim_intr_config->urange_c >
1552 (tim_intr_config->urange_c !=
1556 if ((tim_intr_config->uec_c >
1558 (tim_intr_config->uec_c !=
1562 if ((tim_intr_config->uec_d >
1564 (tim_intr_config->uec_d !=
1568 if (((tim_intr_config->ufca_intr_thres <
1570 (tim_intr_config->ufca_intr_thres >
1572 (tim_intr_config->ufca_intr_thres !=
1576 if (((tim_intr_config->ufca_lo_lim <
1578 (tim_intr_config->ufca_lo_lim >
1580 (tim_intr_config->ufca_lo_lim !=
1584 if (((tim_intr_config->ufca_hi_lim <
1586 (tim_intr_config->ufca_hi_lim >
1588 (tim_intr_config->ufca_hi_lim !=
1592 if (((tim_intr_config->ufca_lbolt_period <
1594 (tim_intr_config->ufca_lbolt_period >
1596 (tim_intr_config->ufca_lbolt_period !=