Lines Matching refs:mBIT

528 #define	VXGE_HAL_RING_RXD_LIST_OWN_ADAPTER		    mBIT(7)
531 #define VXGE_HAL_RING_RXD_FAST_PATH_ELIGIBLE mBIT(8)
534 #define VXGE_HAL_RING_RXD_L3_CKSUM_CORRECT mBIT(9)
537 #define VXGE_HAL_RING_RXD_L4_CKSUM_CORRECT mBIT(10)
562 #define VXGE_HAL_RING_RXD_SYN mBIT(16)
565 #define VXGE_HAL_RING_RXD_IS_ICMP mBIT(17)
568 #define VXGE_HAL_RING_RXD_RTH_SPDM_HIT mBIT(18)
571 #define VXGE_HAL_RING_RXD_RTH_IT_HIT mBIT(19)
593 #define VXGE_HAL_RING_RXD_IS_VLAN mBIT(24)
603 #define VXGE_HAL_RING_RXD_IS_IPV4 mBIT(27)
606 #define VXGE_HAL_RING_RXD_IS_IPV6 mBIT(28)
609 #define VXGE_HAL_RING_RXD_IS_IPV_FRAG mBIT(29)
612 #define VXGE_HAL_RING_RXD_IS_TCP mBIT(30)
615 #define VXGE_HAL_RING_RXD_IS_UDP mBIT(31)
634 #define VXGE_HAL_RING_RXD_LIST_TAIL_OWN_ADAPTER mBIT(0)
778 * #define VXGE_HAL_RING_RXD_LIST_OWN_ADAPTER mBIT(7)
782 * #define VXGE_HAL_RING_RXD_FAST_PATH_ELIGIBLE mBIT(8)
786 * #define VXGE_HAL_RING_RXD_L3_CKSUM_CORRECT mBIT(9)
790 * #define VXGE_HAL_RING_RXD_L4_CKSUM_CORRECT mBIT(10)
819 * #define VXGE_HAL_RING_RXD_SYN mBIT(16)
822 * #define VXGE_HAL_RING_RXD_IS_ICMP mBIT(17)
825 * #define VXGE_HAL_RING_RXD_RTH_SPDM_HIT mBIT(18)
828 * #define VXGE_HAL_RING_RXD_RTH_IT_HIT mBIT(19)
854 * #define VXGE_HAL_RING_RXD_IS_VLAN mBIT(24)
864 * #define VXGE_HAL_RING_RXD_IS_IPV4 mBIT(27)
867 * #define VXGE_HAL_RING_RXD_IS_IPV6 mBIT(28)
870 * #define VXGE_HAL_RING_RXD_IS_IPV_FRAG mBIT(29)
873 * #define VXGE_HAL_RING_RXD_IS_TCP mBIT(30)
876 * #define VXGE_HAL_RING_RXD_IS_UDP mBIT(31)
902 #define VXGE_HAL_RING_RXD_3_BUFFER_EMPTY mBIT(0)
1083 * #define VXGE_HAL_RING_RXD_LIST_OWN_ADAPTER mBIT(7)
1087 * #define VXGE_HAL_RING_RXD_FAST_PATH_ELIGIBLE mBIT(8)
1091 * #define VXGE_HAL_RING_RXD_L3_CKSUM_CORRECT mBIT(9)
1095 * #define VXGE_HAL_RING_RXD_L4_CKSUM_CORRECT mBIT(10)
1127 * #define VXGE_HAL_RING_RXD_SYN mBIT(16)
1130 * #define VXGE_HAL_RING_RXD_IS_ICMP mBIT(17)
1133 * #define VXGE_HAL_RING_RXD_RTH_SPDM_HIT mBIT(18)
1136 * #define VXGE_HAL_RING_RXD_RTH_IT_HIT mBIT(19)
1162 * #define VXGE_HAL_RING_RXD_IS_VLAN mBIT(24)
1172 * #define VXGE_HAL_RING_RXD_IS_IPV4 mBIT(27)
1175 * #define VXGE_HAL_RING_RXD_IS_IPV6 mBIT(28)
1178 * #define VXGE_HAL_RING_RXD_IS_IPV_FRAG mBIT(29)
1181 * #define VXGE_HAL_RING_RXD_IS_TCP mBIT(30)
1184 * #define VXGE_HAL_RING_RXD_IS_UDP mBIT(31)
2168 #define VXGE_HAL_FIFO_TXD_LIST_OWN_ADAPTER mBIT(7)
2205 #define VXGE_HAL_FIFO_TXD_LSO_FLAG mBIT(30)
2218 #define VXGE_HAL_FIFO_TXD_TX_CKO_IPV4_EN mBIT(5)
2221 #define VXGE_HAL_FIFO_TXD_TX_CKO_TCP_EN mBIT(6)
2224 #define VXGE_HAL_FIFO_TXD_TX_CKO_UDP_EN mBIT(7)
2226 #define VXGE_HAL_FIFO_TXD_TX_CKO_CONTROL (mBIT(5)|mBIT(6)|mBIT(7))
2229 #define VXGE_HAL_FIFO_TXD_VLAN_ENABLE mBIT(15)
2238 #define VXGE_HAL_FIFO_TXD_NO_BW_LIMIT mBIT(43)
2241 #define VXGE_HAL_FIFO_TXD_INT_TYPE_PER_LIST mBIT(46)
2244 #define VXGE_HAL_FIFO_TXD_INT_TYPE_UTILZ mBIT(47)
3655 return (reason & mBIT(vp_id + 3));