Lines Matching defs:encp
85 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
93 encp->enc_external_port = (uint8_t)enp->en_mcdi.em_emip.emi_port;
100 EFX_MAC_ADDR_COPY(encp->enc_mac_addr, mac_addr);
102 encp->enc_board_type = board_type;
105 encp->enc_clk_mult = 1;
111 encp->enc_clk_mult = 2;
115 encp->enc_evq_timer_quantum_ns =
116 EFX_EVQ_SIENA_TIMER_QUANTUM_NS / encp->enc_clk_mult;
117 encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns <<
121 encp->enc_rx_prefix_size = 16;
124 encp->enc_rx_buf_align_start = 1;
125 encp->enc_rx_buf_align_end = 1;
128 encp->enc_rx_push_align = 1;
140 encp->enc_evq_limit = nevq;
141 encp->enc_rxq_limit = MIN(EFX_RXQ_LIMIT_TARGET, nrxq);
142 encp->enc_txq_limit = MIN(EFX_TXQ_LIMIT_TARGET, ntxq);
144 encp->enc_buftbl_limit = SIENA_SRAM_ROWS -
145 (encp->enc_txq_limit * EFX_TXQ_DC_NDESCS(EFX_TXQ_DC_SIZE)) -
146 (encp->enc_rxq_limit * EFX_RXQ_DC_NDESCS(EFX_RXQ_DC_SIZE));
148 encp->enc_hw_tx_insert_vlan_enabled = B_FALSE;
149 encp->enc_fw_assisted_tso_enabled = B_FALSE;
150 encp->enc_fw_assisted_tso_v2_enabled = B_FALSE;
151 encp->enc_allow_set_mac_with_installed_filters = B_TRUE;
154 encp->enc_required_pcie_bandwidth_mbps = 2 * 10000;
155 encp->enc_max_pcie_link_gen = EFX_PCIE_LINK_SPEED_GEN2;
171 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
180 siena_phy_decode_stats(enp, encp->enc_mcdi_phy_stat_mask,
181 NULL, &encp->enc_phy_stat_mask, NULL);
197 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
265 encp->enc_features = enp->en_features;